[FM-India]CEFIPRA Project Research Associate Position

*CEFIPRA Project Research Associate Position* CEFIPRA Research Associate (RA)/postdoc position for the *“**SINCRET: Scalable and incremental security monitoring and enforcement for timed systems**”* project. *Announcement:* Applications are invited for one Research Associate (RA)/postdoc position to work at IIT Bhubaneswar on the “*SINCRET: Scalable and incremental security monitoring and enforcement for timed systems*” project. It is a CEFIPRA Indo-French collaborative project under the DST-Inria targeted programme. Details of current members working on the project from IIT Bhubaneswar, India and form Inria, Rennes, France are available here: https://devine.inria.fr/SINCRET/People.htm *Background:* In recent years, research on monitoring runtime behaviour of a system has gained significant attention. The domain of Runtime Monitoring and Verification has gained popularity due to its focus on dynamic behaviour of the system. In a nutshell, Runtime Verification (RV) domain focuses on developing algorithms that automatically generates a monitor from a given specification. The monitor, then, captures the execution of the system and gives a verdict on whether it satisfies the given specification [1]. In 2000, Schneider [2] made the first significant attempt to define a class of security policies that are enforceable. This led to the advent of a new sub-domain of research called Runtime Enforcement (RE). RE can be thought of as an extension of the RV domain, that along with monitoring a system for a given specification, provides assurance that the system satisfies the specification [3, 4, 5]. We work in the field of runtime enforcement, with special focus on timed systems. We work towards developing compositional RE monitors for timed systems. *Objectives:* One of the primary objectives of the *SINCRET* project is to investigate and formulate the theory (and the corresponding monitor synthesis tools) related to incremental/compositionality of enforcers in the timed context. Compositionality refers to combining multiple individual enforcers effectively and efficiently. We will initially consider the enforcement monitor synthesis framework suitable for reactive Cyber Physical Systems (CPS) proposed in [8] for discrete timed properties. We will study/explore various schemes for incrementally adding/composing enforcers in such frameworks. We will consider various schemes for composing enforcers such as serial and parallel composition schemes. In addition to theory and the monitor synthesis tools, we will also explore pros/cons of these schemes using application scenarios related to security of CPSs. More details about the project like related literature, team members, recent publications etc. is available on the website: https://devine.inria.fr/SINCRET/index.html. *Vacant Position**:* The project currently has one vacant Research Associate (RA)/postdoc position. - *Eligibility*: PhD degree in computer science is preferred. However, candidates with masters’ in CSE with relevant research experience/publications are also welcome to apply. - *Remuneration*: It will be as per DST norms for a Research Associate (RA)/postdoc position. - *Location*: The work location is IIT Bhubaneswar, India. - *Preferred Knowledge, Skills & Abilities*: Background/knowledge in Formal Methods, Timed systems/Timed automata, programming and development skills, ability to work effectively in a team as well as independently, and good communication skills. *To apply and for queries about the position:* Those interested, to apply please send your CV to Dr. Srinivas Pinisetty (email: spinisetty(a)iitbbs.ac.in) before 30th September 2025. In case of any queries about the position, please contact Dr. Srinivas Pinisetty (email: spinisetty(a)iitbbs.ac.in). *References:* [1] Ezio Bartocci and Yli`es Falcone. Lectures on runtime verification. Springer, 2018. [2] Fred B Schneider. Enforceable security policies. ACM Transactions on Information and System Security (TISSEC), 3(1):30–50, 2000. [3] Jay Ligatti and Srikar Reddy. A theory of runtime enforcement, with results. In European Symposium on Research in Computer Security, pages 87–100. Springer, 2010. [4] Srinivas Pinisetty, Partha S Roop, Steven Smyth, Stavros Tripakis, and Reinhard von Hanxleden. Runtime enforcement of reactive systems using synchronous enforcers. In Proceedings of the 24th ACM SIGSOFT international SPIN symposium on model checking of software, pages 80–89, 2017. [5] Srinivas Pinisetty, Partha S Roop, Steven Smyth, Nathan Allen, Stavros Tripakis, and Reinhard Von Hanxleden. Runtime enforcement of cyber-physical systems. ACM Transactions on Embedded Computing Systems (TECS). ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- Best Regards Dr. Srinivas Pinisetty Associate Professor (CSE) School of Electrical and Computer Sciences Indian Institute of Technology Bhubaneswar Odisha 752050, India https://www.iitbbs.ac.in/profile.php/srinivaspinisetty/