Dear all,
The next talk in the IARCS Verification Seminar Series will be given by
Soumyadip Bandyopadhyay, an industrial researcher and engineer at ABB,
specializing in verification and evolution of safety-critical automation
software.. The talk is scheduled on Tuesday, May 12, at 1900 hrs IST (add
to Google calendar
<https://calendar.google.com/calendar/event?action=TEMPLATE&tmeid=NDR2dTZtcn…>
).
The details of the talk can be found on our webpage (
https://fmindia.cmi.ac.in/vss/), and also appended to the body of this
email.
The Verification Seminar Series, an initiative by the Indian Association
for Research in Computing Science (IARCS), is a monthly, online
talk-series, broadly in the area of Formal Methods and Programming
Languages, with applications in Verification and Synthesis. The aim of this
talk-series is to provide a platform for Formal Methods researchers to
interact regularly. In addition, we hope that it will make it easier for
researchers to explore newer problems/areas and collaborate on them, and
for younger researchers to start working in these areas.
All are welcome to join.
Best regards,
Organizers, IARCS Verification Seminar Series
=============================================================
Title: Formal Verification of PLC Software Evolution Across Migration and
Upgrade
Meeting Link:
https://us02web.zoom.us/j/89164094870?pwd=eUFNRWp0bHYxRVpwVVNoVUdHU0djQT09
(Meeting ID: 891 6409 4870, Passcode: 082194)
Abstract:
Industrial plants rely on Programmable Logic Controllers (PLC) and
Distributed Control Systems (DCS) for automation. As industrial
requirements evolve, control software undergoes *migration* from legacy
languages such as Taylor™ Control Language (TCL) to IEC 61131-3 compliant
Sequential Function Charts (SFC), as well as *upgradation* of existing SFC
programs through the addition of new features. Both processes risk
introducing unintended behavioural deviations that may compromise safety.
This work addresses automatic behavioural verification during PLC software
evolution. We present a Petri net based framework that models TCL and SFC
programs as formal behavioural representations. The approach verifies
behavioural equivalence for migration and checks containment between older
and upgraded SFC versions using a symbolic path-based equivalence checking
algorithm, ensuring the preservation of existing functionality while
accommodating new features.
Bio: Soumyadip Bandyopadhyay is an industrial researcher and engineer
specializing in verification and evolution of safety-critical automation
software. He currently works at ABB, contributing to the development and
validation of industrial control systems based on Programmable Logic
Controllers (PLC) and Distributed Control Systems (DCS). His work focuses
on ensuring correctness, reliability, and safe modernization of legacy
control software through formal verification, behavioral equivalence
checking, and automated software migration techniques. With prior
experience as an Assistant Professor at BITS Pilani and a postdoctoral
researcher at the Hasso Plattner Institute, Germany, he bridges academic
research and industrial practice. His interests include formal methods for
industrial automation, trustworthy AI for engineering workflows, and
verification of software upgrades in large-scale industrial systems.
Dear all,
The next talk in the IARCS Verification Seminar Series will be given by
Soumyadip Bandyopadhyay, an industrial researcher and engineer at ABB,
specializing in verification and evolution of safety-critical automation
software.. The talk is scheduled on Tuesday, May 12, at 1900 hrs IST (add
to Google calendar
<https://calendar.google.com/calendar/event?action=TEMPLATE&tmeid=NDR2dTZtcn…>
).
The details of the talk can be found on our webpage (
https://fmindia.cmi.ac.in/vss/), and also appended to the body of this
email.
The Verification Seminar Series, an initiative by the Indian Association
for Research in Computing Science (IARCS), is a monthly, online
talk-series, broadly in the area of Formal Methods and Programming
Languages, with applications in Verification and Synthesis. The aim of this
talk-series is to provide a platform for Formal Methods researchers to
interact regularly. In addition, we hope that it will make it easier for
researchers to explore newer problems/areas and collaborate on them, and
for younger researchers to start working in these areas.
All are welcome to join.
Best regards,
Organizers, IARCS Verification Seminar Series
=============================================================
Title: Formal Verification of PLC Software Evolution Across Migration and
Upgrade
Meeting Link:
https://us02web.zoom.us/j/89164094870?pwd=eUFNRWp0bHYxRVpwVVNoVUdHU0djQT09
(Meeting ID: 891 6409 4870, Passcode: 082194)
Abstract:
Industrial plants rely on Programmable Logic Controllers (PLC) and
Distributed Control Systems (DCS) for automation. As industrial
requirements evolve, control software undergoes *migration* from legacy
languages such as Taylor™ Control Language (TCL) to IEC 61131-3 compliant
Sequential Function Charts (SFC), as well as *upgradation* of existing SFC
programs through the addition of new features. Both processes risk
introducing unintended behavioural deviations that may compromise safety.
This work addresses automatic behavioural verification during PLC software
evolution. We present a Petri net based framework that models TCL and SFC
programs as formal behavioural representations. The approach verifies
behavioural equivalence for migration and checks containment between older
and upgraded SFC versions using a symbolic path-based equivalence checking
algorithm, ensuring the preservation of existing functionality while
accommodating new features.
Bio: Soumyadip Bandyopadhyay is an industrial researcher and engineer
specializing in verification and evolution of safety-critical automation
software. He currently works at ABB, contributing to the development and
validation of industrial control systems based on Programmable Logic
Controllers (PLC) and Distributed Control Systems (DCS). His work focuses
on ensuring correctness, reliability, and safe modernization of legacy
control software through formal verification, behavioral equivalence
checking, and automated software migration techniques. With prior
experience as an Assistant Professor at BITS Pilani and a postdoctoral
researcher at the Hasso Plattner Institute, Germany, he bridges academic
research and industrial practice. His interests include formal methods for
industrial automation, trustworthy AI for engineering workflows, and
verification of software upgrades in large-scale industrial systems.
SYNT 2026 : 15th International Workshop on Synthesis
25th July 2026
Co-located with FLoC 2026, Lisbon, Portugal
---
The SYNT workshop aims to bring together researchers interested in the
broad area of synthesis of computing systems. The workshop fosters the
development of frontier techniques in automating the development of
computing systems and is inclusive in its interpretation of the term
“synthesis”.
SYNT 2026 encourages submissions that can be broadly categorized into
one of the tracks: reactive synthesis, functional synthesis and
neuro-symbolic synthesis. However, submissions in other areas related
to synthesis are also welcome. --- Topics of interest include, but
are not limited to: - Algorithms and tools for synthesis of computing
systems, broadly interpreted - Reactive (discrete-time, timed, hybrid,
...) synthesis - Functional (program, circuit, …) synthesis -
Neuro-symbolic synthesis - Specification languages and optimization in
synthesis, - Complexity and decidability results for synthesis, - Case
studies of software or hardware synthesis, - Connections between
verification and synthesis, - Synthesis by model learning, -
Connections between synthesis and inductive programming, - New
approaches or applications for synthesis, - Description and analysis
of benchmark families for synthesis.
---
**SYNT 2026 submission instructions**
SYNT 2026 welcomes submissions of extended abstracts up to 3 pages,
excluding references.
All submissions should be in the Lecture Notes in Computer Science
(LNCS) format:
<https://www.springer.com/gp/computer-science/lncs/conference-proceedings-gu…>
As in previous years, there will be no published proceedings of SYNT
2026. However, /authors of selected abstracts may be invited to submit
an extended version to a special issue of Acta Informatica./
Submissions will be judged on how interesting they are to the SYNT
community. Overlap with previously published work should be indicated
but does not disqualify a submission if the presentation can be
expected to be of enough interest. Parallel submissions are welcome as
well, since there will be no published proceedings.
---
**WORKSHOP URL:** <https://synt2026.github.io/>
**SUBMISSION URL:** <https://submissions.floc26.org/synt/>
---
**IMPORTANT DATES:**
- Submission: (extended to) 15th May (AoE)
- Author Notification: 29th May (AoE)
- Early registration for workshop ends on: 1st June
- Workshop: 25th July
---
Organisers:
Supratik Chakraborty (Indian Institute of Technology Bombay)
K. S. Thejaswini (Université libre de Bruxelles)
Dear all
We are pleased to announce three research assistant positions at the post-bachelor's (pre-PhD/pre-doc) and two PhD positions in the ANRF-funded project "Scalable, Robust, and Trustworthy Program Synthesis". The project investigates automated synthesis when the specification is partial or contradictory, combining techniques from SAT , SMT, and reinforcement learning.
Both the positions are at Ashoka University, Sonipat (NCR).
Research Assistant Positions:
Duration: 12 months to up to 36 months, with renewal after every year based on the performance of the candidate.
The positions are available immediately. Applicants must have at least a three-year undergraduate degree in Computer Science (or be in the process of concluding one by June 2026). A master's degree is preferred but not necessary.
Required qualifications: strong level of familiarity with algorithms, logic, and formal methods; s trong programming skills; familiarity with automata, games, and complexity is appreciated
PhD Positions:
PhD program will be the regular program at Ashoka University ( https://www.ashoka.edu.in/programme/new-horizons-in-computer-science-ph-d-p… ).
I will be glad to answer further questions and look forward to receiving your application for this exciting research opportunity! If interested, please contact me and send y our CV and the name of one reference. For more details, contact me at thakkar(a)ashoka.edu.in.
Thank you
Aalok Thakkar
--
*Confidentiality Notice:* This email and any attachments may contain
confidential or privileged information. If you are not the intended
recipient, please notify the sender by replying to this message, and then
delete the email and any attachments permanently. Thank you.
Dear all
We are pleased to announce *three research assistant positions* at the post-bachelor's (pre-PhD/pre-doc) and *two PhD positions* in the ANRF-funded project "Scalable, Robust, and Trustworthy Program Synthesis". The project investigates automated synthesis when the specification is partial or contradictory, combining techniques from SAT , SMT, and reinforcement learning.
Both the positions are at Ashoka University, Sonipat (NCR).
*Research* *Assistant* *Positions:*
Duration: 12 months to up to 36 months, with renewal after every year based on the performance of the candidate.
The positions are available immediately. Applicants must have at least a three-year undergraduate degree in Computer Science (or be in the process of concluding one by June 2026). A master's degree is preferred but not necessary.
Required qualifications: strong level of familiarity with algorithms, logic, and formal methods; s trong programming skills; f amiliarity with automata, games, and complexity is appreciated
** *PhD* *Positions:*
PhD program will be the regular program at the Vachani School of Advanced Computing ( https://www.ashoka.edu.in/programme/new-horizons-in-computer-science-ph-d-p… ).
I will be glad to answer further questions and look forward to receiving your application for this exciting research opportunity! If interested, please contact me and send y our CV and the name of one reference. For more details, contact me at thakkar(a)ashoka.edu.in.
Thank you
*Aalok Thakkar* *(* *આલોક ઠક્કર)*
Assistant Professor, Department of Computer Science
+91 98982 29865 | aalok-thakkar.github.io ( http://aalok-thakkar.github.io )
Please note: this email may have been sent at a time that aligns with my schedule. Managing work and life responsibilities is unique to each person; kindly respond at a time that works best for you.
Sent via Superhuman ( https://superhuman.com/refer/1a2nj18b?utm_medium=signature&utm_source=produ… )
--
*Confidentiality Notice:* This email and any attachments may contain
confidential or privileged information. If you are not the intended
recipient, please notify the sender by replying to this message, and then
delete the email and any attachments permanently. Thank you.