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IARCS Verification Seminar Series -- Talk by Nikhil Swamy on April 8 at 1900 hrs IST

by VSS IARCS

Dear all, The next talk in the IARCS Verification Seminar Series will be given by Nikhil Swamy, a researcher at Microsoft Research in Redmond. The talk is scheduled on Tuesday, April 8, at 1900 hrs IST (add to Google calendar <https://calendar.google.com/calendar/event?action=TEMPLATE&tmeid=Mm5wcm80ZW…> ). The details of the talk can be found on our webpage ( https://fmindia.cmi.ac.in/vss/), and also appended to the body of this email. The Verification Seminar Series, an initiative by the Indian Association for Research in Computing Science (IARCS), is a monthly, online talk-series, broadly in the area of Formal Methods and Programming Languages, with applications in Verification and Synthesis. The aim of this talk-series is to provide a platform for Formal Methods researchers to interact regularly. In addition, we hope that it will make it easier for researchers to explore newer problems/areas and collaborate on them, and for younger researchers to start working in these areas. All are welcome to join. Best regards, Akash, Deepak, Madhukar, Srivathsan ============================================================= Title: Pulse: Proof-oriented Programming with Concurrent Separation Logic in F* Meeting Link: https://us02web.zoom.us/j/89164094870?pwd=eUFNRWp0bHYxRVpwVVNoVUdHU0djQT09 (Meeting ID: 891 6409 4870, Passcode: 082194) Abstract: F* is a dependently typed programming language. It has been used to develop more than a million lines of verified code and proofs, for artifacts ranging from cryptographic libraries to networking components. Some of this verified software runs in widely used production systems, ranging from the Windows kernel to the Python standard library. However, most of this corpus of verified code is purely sequential. Pulse is a new extension of F* enabling programming and proving imperative programs with shared-memory concurrency. Proofs in Pulse are conducted in a new program logic called PulseCore, a concurrent separation logic with state-of-the-art features, including higher-order ghost state and impredicative invariants, backed by a foundational semantics developed within F* itself. Programs are verified in Pulse using a custom checker with a combination of tactics and SMT solving. Once proven, programs in Pulse can be extracted to OCaml, C, or Rust, depending on the libraries and features used. Pulse is being used in a number of new projects, including in the development of verified firmware, in new libraries for secure data formatting, and for verified CPU/GPU programs. I will provide some background on F* and concurrent separation logic, and then introduce Pulse by way of examples and a tool demonstration. Bio: Nikhil Swamy is a researcher at Microsoft Research in Redmond, working in the Research in Software Engineering (RiSE) group. He is interested in type systems, program logics, functional programming, program verification and interactive theorem proving, and also in the use of these techniques to build provably secure programs, including web applications, web browsers, crypto protocol implementations, and low-level systems code.

1 year

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Reminder: Webinar on logic education

by Madhavan Mukund

A reminder about this talk tomorrow. The Europe times in the original message were wrong. They have been corrected below. ----- Forwarded message from R Ramanujam <jam(a)imsc.res.in> ----- From: R Ramanujam <jam(a)imsc.res.in> The DLMPST Commission on Logic Education https://dlmps.org/pages/commissions.php invites you to a webinar on logic education by Professor Maria Manzano. Date: Apr 8, 2025 Time: 1000 New York, 1400 GMT, 1600 Amsterdam, 1930 Bangalore, 2200 Beijing Zoom link: https://cmi-ac-in.zoom.us/j/89497108451?pwd=rLl7QvAfnfJHTxp5h6ZVoZzyGuvNQQ.1 Meeting ID: 894 9710 8451 Passcode: udayana Talk details: Tools for teaching logic Maria Manzano Salamanca, Spain I will tell you about the European ALFA project on Tools for Teaching Logic that we had last century and about the International TTL Congresses that we held in 2000, 2006, 2015, and 2023. The first goal of the ALFA project was to share our experience as teachers among Aracne members. We proposed: (1) the preparation of a metabook (with hypertext version), (2) the design of an on-line dictionary of logic terms, (3) the investigation of the existing software for the teaching of logic, (4) the translation of both elementary and interdisciplinary texts and software, (5) to help potential authors to write lecture notes, (6) the dissemination of our project both within our academic community and outside it (high school), thus bolstering a good image of Logic and (7) to support women’s participation in higher education. The network we created was interdisciplinary and included professors and researchers from philosophy, mathematics, computer science, and linguistics. Some of the results of the project can be consulted on the Aracne website (aracne.usal.es.) and others in the Summa Logicae digital library (logicae.usal.es) Speaker Bio: María Gracia Manzano Arjona is a Spanish philosopher specializing in mathematical logic and model theory. Manzano earned her Ph.D. in 1977 from the University of Barcelona. Her dissertation, Sistemas generales de la lógica de segundo orden [General systems of second-order logic], was supervised by Jesús Mosterín. She is a professor of logic and the philosophy of science at the University of Salamanca. She is the author of several books on logic and model theory. https://en.wikipedia.org/wiki/Mar%C3%ADa_Manzano -- R Ramanujam ----- End forwarded message -----

1 year

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ATVA 2025: Joint Call for Papers, Workshops and Tutorials

by Madhavan Mukund

----- Forwarded message from Meenakshi D'Souza <meenakshi(a)iiitb.ac.in> ----- From: Meenakshi D'Souza <meenakshi(a)iiitb.ac.in> Date: Sat, 5 Apr 2025 18:03:40 +0000 Subject: ATVA 2025: Joint Call for Papers, Workshops and Tutorials Call for Papers, Workshops and Tutorials ------------------------------------------------------- The 23rd International Symposium on Automated Technology for Verification and Analysis (ATVA 2025) 27-30 October 2025, Bangalore, India https://conf.researchr.org/home/atva-2025 AIM AND SCOPE ATVA 2025 is the 23rd in a series of symposia aimed at bringing together academics, industrial researchers and practitioners in the area of theoretical and practical aspects of automated analysis, synthesis, and verification of hardware and software systems. ATVA solicits high quality submissions in the following suggestive list of topics: - Formalisms for modeling hardware, software and embedded systems - Specification and verification of finite-state, infinite-state and parameterized systems - Program analysis and software verification - Analysis and verification of hardware circuits, systems-on-chip and embedded systems - Analysis of real-time, hybrid, priced, weighted and probabilistic systems - Deductive, algorithmic, compositional, and abstraction/refinement techniques for analysis and verification - Analytical techniques for safety, security, and dependability - Testing and runtime analysis based on verification technology - Analysis and verification of parallel and concurrent systems - Verification in industrial practice - Synthesis for hardware and software systems - Applications and case studies of verification - Automated tool support for verification - Testing and verification of neural networks - Testing and verification of autonomous systems IMPORTANT DATES (all deadlines in AoE) - Abstract submission deadline: April 11, 2025 - Paper submission deadline: April 18, 2025 - Author response period: June 10 - 13, 2025 - Paper notification: June 25, 2025 - Camera-ready deadline: July 25, 2025 - Tutorials: October 27, 2025 - Workshops: 31 October 2025 - Conference: October 28 - October 30, 2025 ARTIFACT SUBMISSION DEADLINES (all deadlines in AoE): For tool papers: - Artifact submission deadline: April 25, 2025 - Smoke test reviews: May 1, 2025 - Submission of revised artifacts: May 3, 2025 - Author notification: June 25, 2025 For accepted regular papers: - Artifact submission: June 28, 2025 - Author notification: July 21, 2025 SUBMISSION GUIDELINES ATVA welcomes submissions in the following two categories: - Regular research papers (18 pages, excluding references, must be anonymized) - Tool papers (10 pages, excluding references, not anonymized) Submissions authored or co-authored by members of the program committee are allowed and encouraged. Papers must be submitted through EasyChair<https://easychair.org/conferences/?conf=atva2025>. Submissions in both categories must be in Springer's LNCS format. Accepted papers in both categories will be published in Springer's Lecture Notes in Computer Science series. A few outstanding papers will be selected for a distinguished paper award. At least one author of each accepted paper is expected to register and present the paper at the conference. REGULAR PAPERS Regular papers should not exceed 18 pages in Springer’s LNCS format, not counting references and appendices. Additional material may be placed in an appendix, to be read at the discretion of the reviewers, and to be omitted in the final version. Regular papers at ATVA 2025 will follow a full *double-blind* review process, which means that author names and affiliations must be omitted from the submission. Additionally, if a submission refers to prior work done by the authors, the reference should be made in the third person. These are firm submission requirements, and any regular paper that does not conform to these requirements will be rejected without review. Authors of accepted regular papers will be invited (but are not required) to submit a relevant artifact for evaluation by the artifact evaluation committee. The submission deadline for this artifact evaluation will be soon after the paper acceptance notification. Independent of the artifact evaluation process, research paper authors are encouraged to include a URL to a repository in their original submission, if such a repository is available and is pertinent to the paper. This repository could contain code, datasets, results, etc. This would be for the consideration of the PC reviewers of the submission, at their discretion. If such a URL is included in the submission, the contents of the repository should adhere to the guidelines of a double-blind review process. The review process will include a rebuttal period where the authors will have the option to respond to reviewer comments. An artifact evaluation will be undertaken, which will be optional for regular papers and mandatory for tool papers. TOOL PAPERS Tool papers should not exceed 10 pages in Springer’s LNCS format, not counting references. Tool papers will follow a single-blind review process. They do NOT need to be anonymized. Tool paper submissions MUST include a URL to an archival site from where the tool can be downloaded or accessed online for evaluation by the artifact evaluation committee. The site must also contain a set of examples, and a user manual that describes usage of the tool through examples. If the tool needs to be downloaded and installed, the site must contain instructions for installing the tool on Linux, Windows or MacOS. Packing the artifact as a Docker container is recommended. Papers describing tools that have already been presented (in any conference) will be accepted only if significant and clear enhancements to the tool are reported and implemented. Acceptance of tool paper submissions is contingent on successful artifact evaluation at the “functional” level. In special cases, where an artifact cannot be submitted, the authors should contact the Artifact Evaluation chairs to find alternate modes of artifact evaluation. More details about artifact evaluation can be found on the conference web site. CALL FOR WORKSHOPS We invite proposals for organizing workshops as part of ATVA 2025. Workshops will be held post-conference, on 31 October 2025. Proposals may be submitted via this Proposal Form<https://docs.google.com/forms/d/e/1FAIpQLSfyZ7otNMqivg5xnS2aPIyzEKW__LPC2SE…>. The last date for submitting workshop proposals is 30 April 2025. CALL FOR TUTORIALS We invite proposals for organizing tutorials as a part of ATVA 2025. Tutorials will be held pre-conference, on 27 October 2025. Tutorial proposals can be submitted via this Proposal Form<https://docs.google.com/forms/d/e/1FAIpQLSeLRNufBv7sL-_SJWJXhs7aLOnML_mn3S9…>. The last date for submitting tutorial proposals is 30 April 2025. GENERAL CHAIR Deepak D’Souza, Indian Institute of Science, Bangalore, India LOCAL ORGANIZATION CHAIR Sujit Kumar Chakrabarti, IIIT-Bangalore, India PROGRAM CHAIRS Meenakshi D’Souza, IIIT-Bangalore, India < meenakshi(a)iiitb.ac.in > K. V. Raghavan, Indian Institute of Science, Bangalore, India < raghavan(a)iisc.ac.in > B. Srivathsan, Chennai Mathematical Institute, Chennai, India < sri(a)cmi.ac.in > ARTIFACT EVALUATION CHAIRS Jie An, Institute of Software, Chinese Academy of Sciences, Beijing, China Priyanka Golia, IIT Delhi, India ----- End forwarded message -----

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IARCS Verification Seminar Series -- Talk by Nikhil Swamy on April 8 at 1900 hrs IST

by VSS IARCS

Dear all, The next talk in the IARCS Verification Seminar Series will be given by Nikhil Swamy, a researcher at Microsoft Research in Redmond. The talk is scheduled on Tuesday, April 8, at 1900 hrs IST (add to Google calendar <https://calendar.google.com/calendar/event?action=TEMPLATE&tmeid=Mm5wcm80ZW…> ). The details of the talk can be found on our webpage ( https://fmindia.cmi.ac.in/vss/), and also appended to the body of this email. The Verification Seminar Series, an initiative by the Indian Association for Research in Computing Science (IARCS), is a monthly, online talk-series, broadly in the area of Formal Methods and Programming Languages, with applications in Verification and Synthesis. The aim of this talk-series is to provide a platform for Formal Methods researchers to interact regularly. In addition, we hope that it will make it easier for researchers to explore newer problems/areas and collaborate on them, and for younger researchers to start working in these areas. All are welcome to join. Best regards, Akash, Deepak, Madhukar, Srivathsan ============================================================= Title: Pulse: Proof-oriented Programming with Concurrent Separation Logic in F* Meeting Link: https://us02web.zoom.us/j/89164094870?pwd=eUFNRWp0bHYxRVpwVVNoVUdHU0djQT09 (Meeting ID: 891 6409 4870, Passcode: 082194) Abstract: F* is a dependently typed programming language. It has been used to develop more than a million lines of verified code and proofs, for artifacts ranging from cryptographic libraries to networking components. Some of this verified software runs in widely used production systems, ranging from the Windows kernel to the Python standard library. However, most of this corpus of verified code is purely sequential. Pulse is a new extension of F* enabling programming and proving imperative programs with shared-memory concurrency. Proofs in Pulse are conducted in a new program logic called PulseCore, a concurrent separation logic with state-of-the-art features, including higher-order ghost state and impredicative invariants, backed by a foundational semantics developed within F* itself. Programs are verified in Pulse using a custom checker with a combination of tactics and SMT solving. Once proven, programs in Pulse can be extracted to OCaml, C, or Rust, depending on the libraries and features used. Pulse is being used in a number of new projects, including in the development of verified firmware, in new libraries for secure data formatting, and for verified CPU/GPU programs. I will provide some background on F* and concurrent separation logic, and then introduce Pulse by way of examples and a tool demonstration. Bio: Nikhil Swamy is a researcher at Microsoft Research in Redmond, working in the Research in Software Engineering (RiSE) group. He is interested in type systems, program logics, functional programming, program verification and interactive theorem proving, and also in the use of these techniques to build provably secure programs, including web applications, web browsers, crypto protocol implementations, and low-level systems code.

1 year

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Lead Software Engineer position in FV tool - Jasper/Cadence

by Ravi Prakash

Hi, We have an open position in industry leading formal product Jasper from Cadence. The position is in Bangalore and we are interested in recently completed PhDs or a Masters in formal domain. Looking for people who are passionate about formal/coding and making an impact with their knowledge in Jasper. Please write to me directly at ravipr(a)gmail.com or ravipr(a)cadence.com for further details. Thanks Ravi

1 year, 1 month

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Webinar on logic education

by Madhavan Mukund

----- Forwarded message from R Ramanujam <jam(a)imsc.res.in> ----- From: R Ramanujam <jam(a)imsc.res.in> The DLMPST Commission on Logic Education https://dlmps.org/pages/commissions.php invites you to a webinar on logic education by Professor Maria Manzano. Date: Apr 8, 2025 Time: 1000 EST, 1200 GMT, 1400 CET, 1930 IST, 2200 (Beijing) Zoom link: https://cmi-ac-in.zoom.us/j/89497108451?pwd=rLl7QvAfnfJHTxp5h6ZVoZzyGuvNQQ.1 Meeting ID: 894 9710 8451 Passcode: udayana Talk details: Tools for teaching logic Maria Manzano Salamanca, Spain I will tell you about the European ALFA project on Tools for Teaching Logic that we had last century and about the International TTL Congresses that we held in 2000, 2006, 2011, 2015, and 2023. The first goal of the ALFA project was to share our experience as teachers among Aracne members. We proposed: (1) the preparation of a metabook (with hypertext version), (2) the design of an on-line dictionary of logic terms, (3) the investigation of the existing software for the teaching of logic, (4) the translation of both elementary and interdisciplinary texts and software, (5) to help potential authors to write lecture notes, (6) the dissemination of our project both within our academic community and outside it (high school), thus bolstering a good image of Logic and (7) to support women’s participation in higher education. The network we created was interdisciplinary and included professors and researchers from philosophy, mathematics, computer science, and linguistics. Some of the results of the project can be consulted on the Aracne website (aracne.usal.es.) and others in the Summa Logicae digital library (logicae.usal.es) Speaker Bio: María Gracia Manzano Arjona is a Spanish philosopher specializing in mathematical logic and model theory. Manzano earned her Ph.D. in 1977 from the University of Barcelona. Her dissertation, Sistemas generales de la lógica de segundo orden [General systems of second-order logic], was supervised by Jesús Mosterín. She is a professor of logic and the philosophy of science at the University of Salamanca. She is the author of several books on logic and model theory. https://en.wikipedia.org/wiki/Mar%C3%ADa_Manzano -- R Ramanujam ----- End forwarded message -----

1 year, 1 month

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Call For Papers - APLAS 2025, Bengaluru, India

by Madhavan Mukund

----- Forwarded message from Pritam Gharat <pritamgharat(a)microsoft.com> ----- From: Pritam Gharat <pritamgharat(a)microsoft.com> To: "fmindia-owner(a)cmi.ac.in" <fmindia-owner(a)cmi.ac.in> Date: Wed, 26 Mar 2025 11:02:46 +0000 Subject: Call For Papers - APLAS 2025, Bengaluru, India CALL FOR PAPERS: The 23rd Asian Symposium on Programing Languages and Systems (APLAS 2025) 27-30 October 2025, Bangalore, India APLAS 2025 - The 23rd Asian Symposium on Programming Languages and Systems - APLAS 2025<https://conf.researchr.org/track/aplas-2025/aplas-2025-aplas-2025> AIM AND SCOPE: APLAS 2025 is the 23rd in a series of symposia that solicits submissions in the form of regular research papers describing original scientific research results, including system development and case studies. Among others, solicited topics include: * Programming paradigms and styles: functional, object-oriented, probabilistic, logic, constraint programming; extensible programming languages; programming languages for systems code; novel programming paradigms; * Methods and tools to specify and reason about programs and languages: programming techniques; meta-programming; domain-specific languages; proof assistants; type systems; dependent types; program logics, static and dynamic program analysis; language-based security; model checking; testing; * Programming language foundations: formal semantics; type theory; logical foundations; category theory; automata; effects; monads and comonads; recursion and corecursion; continuations and effect handlers; program verification; memory models; abstract interpretation; * Methods and tools for implementation: compilers; program transformations; rewriting systems; partial evaluation; virtual machines; refactoring; intermediate languages; run-time environments; garbage collection and memory management; tracing; profiling; build systems; program synthesis; * Concurrency and distribution: process algebras; concurrency theory; session types; parallel programming; service-oriented computing; distributed and mobile computing; actor-based languages; verification and testing of concurrent and distributed systems; * Applications and emerging topics: programming languages and PL methods in education, security, privacy, database systems, computational biology, signal processing, graphics, human-computer interaction, computer-aided design, artificial intelligence and machine learning; case studies in program analysis and verification. IMPORTANT DATES (all deadlines in AoE): * Paper submission deadline: April 18, 2025 * Tutorials and Workshops: October 27, 2025 * Conference: October 28 – October 30, 2025 SUBMISSIONS: APLAS welcomes submissions that should not exceed 17 pages, excluding bibliography, in the Springer LNCS format. Additional material intended for reviewers but not for publication in the final version -– for example, details of proofs -– may be placed in a clearly marked appendix that is not included in the page limit. However, the paper must be understandable without the appendix. Reviewers are not obligated to review it. Papers should be submitted via HotCRP: https://aplas25.hotcrp.com/ GENERAL CHAIR: Pritam Gharat, Microsoft Reasearch, India, pritamgharat(a)microsoft.com<mailto:pritamgharat@microsoft.com><mailto:pritamgharat@microsoft.com%3cmailto:pritamgharat@microsoft.com%3e> LOCAL ORGANIZATION CHAIR: Sujit Kumar Chakrabarti, IIIT-Bangalore, India, sujitkc(a)iiitb.ac.in<mailto:<mailto:pritamgharat@microsoft.com%3cmailto:pritamgharat@microsoft.com%3e>sujitkc(a)iiitb.ac.in><mailto:pritamgharat@microsoft.com%3cmailto:pritamgharat@microsoft.com%3e> PROGRAM CHAIRS: Alex Potanin, Australian National University, Alex.Potanin(a)anu.edu.au<mailto:<mailto:pritamgharat@microsoft.com%3cmailto:pritamgharat@microsoft.com%3e>Alex.Potanin(a)anu.edu.au><mailto:pritamgharat@microsoft.com%3cmailto:pritamgharat@microsoft.com%3e> PROGRAM COMMITTEE: Alex Potanin, Australian National University Alexander Bakst, Certora Swarnendu Biswas, IIT Kanpur Andreea Costea, TU Delft Meenakshi D'Souza, IIITB - International Institute of Information Technology Bangalore Jeffrey S. Foster, Tufts University Kihong Heo, KAIST Zhenjiang Hu, Peking University Atsushi Igarashi, Kyoto University Stephen Kell, King's College London Oleg Kiselyov, Tohoku University V Krishna Nandivada, IIT Madras Liyi Li, Iowa State University Umang Mathur, National University of Singapore Kartik Nagar, IIT Madras Liam O'Connor, Australian National University Lionel Parreaux, HKUST (The Hong Kong University of Science and Technology) Sanjiva Prasad, Indian Institute of Technology Delhi G. Ramalingam, Microsoft Ina Schaefer, KIT KC Sivaramakrishnan, IIT Madras and Tarides Tachio Terauchi, Waseda University Manas Thakur, IIT Bombay Pascal Weisenburger, University of St. Gallen ----- End forwarded message -----

1 year, 1 month

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Senior Project Associate/Postdoc Position - Model Checking/Formal Verification/Software Engineering

by Arpit Sharma

Dear All, Hope this email finds you well. I am writing this email to inform you that a senior project associate/postdoc position is available in my research group at IISER Bhopal in the area of model checking/formal verification/software engineering. This position is funded by the DST-SERB Core Research Grant project titled: GALTOSM: A Graph and Logic Transformation Based Toolkit for Software Model Checking. I would request you to please share this information with your PhD/Postdoc students, and colleagues in academia. Candidates with a master's degree + 2 years of relevant research/industry experience or bachelor's degree + 4 years of relevant research/industry experience are also eligible and encouraged to apply. Interested candidates can directly contact me at : arpit(a)iiserb.ac.in The details of this position are as follows: No. of Position: 1 (One) Name of Position: Senior Project Associate Duration: Initially for 1 year, extendable up to 1 year based on satisfactory performance. *Salary: INR 57,000 + HRA* (as applicable) per month. *Essential Qualifications:* Doctoral Degree in Computer Science/Computer Engineering/Software Engineering/Data Science from a recognized University or equivalent. *OR* Bachelor's degree in Engineering or Technology (B.E. or B.Tech) in Computer Engineering/Information Technology/Data Science/Electronics or four years Bachelor’s degree in Computer Science/Mathematics/Physics/Electronics or Master of science (MSc) degree in Computer Science/Data Science/Information Technology/Electronics/Mathematics/Physics from a recognized University or equivalent and four years' experience in Research and Development in computer science (preferably in software design and development or machine learning/natural language processing or formal methods/model checking) in Industrial and Academic Institutions or Science and Technology Organisations and Scientific activities and services. * OR* Master’s degree in engineering or technology (M.E. or M.Tech) in Computer Engineering or Computer Science or Software Engineering or Information Technology or Data Science or Electronics Engineering from a recognized University or equivalent and two years’ experience in Research and Development in computer science (preferably in software design and development or machine learning/natural language processing or formal methods/model checking) in Industrial and Academic Institutions or Science and Technology Organisations and Scientific activities and services. *Desirable: * 1. Candidates should have some prior experience in Software Design and Implementation or development of Software Tools or building Machine Learning Pipelines. 2. This position requires good analytical and reasoning skills. *Age limit:* Candidates should be below 50 years of age on the last date of application. *How to Apply:* Interested candidates are requested to send their CV (including name, date of birth, photograph, address for communication, phone number, email id, details of educational and scientific accomplishments) to Dr. Arpit Sharma over email. Additionally, a copy of all the credentials including mark sheets starting from 12th standard, and UG degree certificate, PG degree certificate, doctoral degree certificate etc also need to be sent via email. Completed applications should reach the undersigned only by email. Last date of application is 06th April 2025. Keep subject of the email to be “Senior Project Associate Application”. Thanks. Regards, Arpit Arpit Sharma Associate Professor Department of Electrical Engineering & Computer Science Indian Institute of Science Education and Research, Bhopal Bhopal - 462066, Madhya Pradesh, India Homepage : https://sites.google.com/iiserb.ac.in/arpit-sharma/

1 year, 1 month

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