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RHPL@FSTTCS 2025: Deadline Extension
by abhisekh.sankaran＠tcs.com 18 Sep '25

18 Sep '25

============================================================= RHPL@FSTTCS 2025: Workshop on Research Highlights in Programming Languages December 2025, BITS Goa, co-located with FSTTCS 2025 Website: https://fmindia.cmi.ac.in/rhpl2025/ Submission link: https://forms.gle/RufuAs54zxsadp1n7 Extended submission deadline: October 3, 2025 IST ============================================================= Dear colleague, As you may know, FSTTCS 2025 (https://www.fsttcs.org.in/2025/) is going to be held at BITS Pilani, K K Birla Goa Campus (https://www.bits-pilani.ac.in/goa/) during December 17 – 19, 2025. The conference is organized by IARCS, the Indian Association for Research in Computing Science (https://www.iarcs.org.in/) in association with ACM India (https://india.acm.org/) It is a very visible forum for presenting original results in foundational aspects of Computer Science and Software Technology. As in the previous years, this year too, co-located with the main FSTTCS conference, IARCS is organizing the Workshop on Research Highlights in Programming Languages (RHPL@FSTTCS). The focus of the workshop will be on all areas of Programming Languages (PL), including but not limited to: - Applied formal methods - Automated and interactive theorem provers - Compilers - Concurrency and memory models - Domain and type theories - Program analysis and verification - Program sketching, synthesis and repair - Programming language design and semantics Further, in view of the increasing role of Artificial Intelligence (AI) and Machine Learning (ML) in PL theory and practice, the workshop also includes in its scope themes pertaining to the influences of AI/ML concepts and tools on the mentioned PL topics, and vice-versa; for instance, probabilistic programming languages. The website for the workshop is: https://fmindia.cmi.ac.in/rhpl2025/. The objective of RHPL is to foster interactions between the attendees of the workshop, and more broadly between researchers working on Programming Languages and the traditional FSTTCS community of researchers working on Theoretical Computer Science and Formal Methods. We solicit: (1) Talk proposals: On recent work that has been published in good venues, or is mature in terms of approach and evaluation. (2) Poster proposals: On early ideas that are promising but have not been developed fully. Selections of these proposals will be made based on the promise of research possibilities and their novelty. Proposals to the workshop can be based on one or more works, published or unpublished. They may be submitted using the Google form below. https://forms.gle/RufuAs54zxsadp1n7 The important dates for the workshop are as below. All dates are in Indian Standard Time (IST). - Submission portal opens: July 28, 2025 - Submission deadline: October 3, 2025 (earlier: September 18, 2025) - Notification: October 10, 2025 (earlier: September 25, 2025) - Early registration deadline: TBA - RHPL@FSTTCS: TBA We look forward to receiving your talk/poster proposals to the workshop. On behalf of the RHPL@FSTTCS workshop organizing committee: Abhisekh Sankaran (TCS Research) (co-Chair) Divyesh Unadkat (Synopsys) (co-Chair) Deepak D'Souza (IISc Bangalore) Uday Khedker (IIT Bombay) Kumar Madhukar (IIT Delhi) Kartik Nagar (IIT Madras) Sumanth Prabhu (TCS Research) Ganesan Ramalingam (Microsoft) Abhik Roychoudhury (National University of Singapore)

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CEFIPRA Project Research Associate Position
by Srinivas Pinisetty 16 Sep '25

16 Sep '25

*CEFIPRA Project Research Associate Position* CEFIPRA Research Associate (RA)/postdoc position for the *“**SINCRET: Scalable and incremental security monitoring and enforcement for timed systems**”* project. *Announcement:* Applications are invited for one Research Associate (RA)/postdoc position to work at IIT Bhubaneswar on the “*SINCRET: Scalable and incremental security monitoring and enforcement for timed systems*” project. It is a CEFIPRA Indo-French collaborative project under the DST-Inria targeted programme. Details of current members working on the project from IIT Bhubaneswar, India and form Inria, Rennes, France are available here: https://devine.inria.fr/SINCRET/People.htm *Background:* In recent years, research on monitoring runtime behaviour of a system has gained significant attention. The domain of Runtime Monitoring and Verification has gained popularity due to its focus on dynamic behaviour of the system. In a nutshell, Runtime Verification (RV) domain focuses on developing algorithms that automatically generates a monitor from a given specification. The monitor, then, captures the execution of the system and gives a verdict on whether it satisfies the given specification [1]. In 2000, Schneider [2] made the first significant attempt to define a class of security policies that are enforceable. This led to the advent of a new sub-domain of research called Runtime Enforcement (RE). RE can be thought of as an extension of the RV domain, that along with monitoring a system for a given specification, provides assurance that the system satisfies the specification [3, 4, 5]. We work in the field of runtime enforcement, with special focus on timed systems. We work towards developing compositional RE monitors for timed systems. *Objectives:* One of the primary objectives of the *SINCRET* project is to investigate and formulate the theory (and the corresponding monitor synthesis tools) related to incremental/compositionality of enforcers in the timed context. Compositionality refers to combining multiple individual enforcers effectively and efficiently. We will initially consider the enforcement monitor synthesis framework suitable for reactive Cyber Physical Systems (CPS) proposed in [8] for discrete timed properties. We will study/explore various schemes for incrementally adding/composing enforcers in such frameworks. We will consider various schemes for composing enforcers such as serial and parallel composition schemes. In addition to theory and the monitor synthesis tools, we will also explore pros/cons of these schemes using application scenarios related to security of CPSs. More details about the project like related literature, team members, recent publications etc. is available on the website: https://devine.inria.fr/SINCRET/index.html. *Vacant Position**:* The project currently has one vacant Research Associate (RA)/postdoc position. - *Eligibility*: PhD degree in computer science is preferred. However, candidates with masters’ in CSE with relevant research experience/publications are also welcome to apply. - *Remuneration*: It will be as per DST norms for a Research Associate (RA)/postdoc position. - *Location*: The work location is IIT Bhubaneswar, India. - *Preferred Knowledge, Skills & Abilities*: Background/knowledge in Formal Methods, Timed systems/Timed automata, programming and development skills, ability to work effectively in a team as well as independently, and good communication skills. *To apply and for queries about the position:* Those interested, to apply please send your CV to Dr. Srinivas Pinisetty (email: spinisetty(a)iitbbs.ac.in) before 30th September 2025. In case of any queries about the position, please contact Dr. Srinivas Pinisetty (email: spinisetty(a)iitbbs.ac.in) *References:* [1] Ezio Bartocci and Yli`es Falcone. Lectures on runtime verification. Springer, 2018. [2] Fred B Schneider. Enforceable security policies. ACM Transactions on Information and System Security (TISSEC), 3(1):30–50, 2000. [3] Jay Ligatti and Srikar Reddy. A theory of runtime enforcement, with results. In European Symposium on Research in Computer Security, pages 87–100. Springer, 2010. [4] Srinivas Pinisetty, Partha S Roop, Steven Smyth, Stavros Tripakis, and Reinhard von Hanxleden. Runtime enforcement of reactive systems using synchronous enforcers. In Proceedings of the 24th ACM SIGSOFT international SPIN symposium on model checking of software, pages 80–89, 2017. [5] Srinivas Pinisetty, Partha S Roop, Steven Smyth, Nathan Allen, Stavros Tripakis, and Reinhard Von Hanxleden. Runtime enforcement of cyber-physical systems. ACM Transactions on Embedded Computing Systems (TECS). ------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- Best Regards Dr. Srinivas Pinisetty Associate Professor (CSE) School of Electrical and Computer Sciences Indian Institute of Technology Bhubaneswar Odisha 752050, India https://www.iitbbs.ac.in/profile.php/srinivaspinisetty/

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IARCS Verification Seminar Series -- Talk by Soumyajit Paul on Sept. 16 at 1900 hrs IST
by VSS IARCS 15 Sep '25

15 Sep '25

Dear all, The next talk in the IARCS Verification Seminar Series will be given by Soumyajit Paul, a post-doctoral researcher at the University of Liverpool. The talk is scheduled on Tuesday, September 16, at 1900 hrs IST (add to Google calendar <https://calendar.google.com/calendar/event?action=TEMPLATE&tmeid=M2EzajE4cT…> ). The details of the talk can be found on our webpage ( https://fmindia.cmi.ac.in/vss/) and also appended to the body of this email. The Verification Seminar Series, an initiative by the Indian Association for Research in Computing Science (IARCS), is a monthly, online talk-series, broadly in the area of Formal Methods and Programming Languages, with applications in Verification and Synthesis. The aim of this talk-series is to provide a platform for Formal Methods researchers to interact regularly. In addition, we hope that it will make it easier for researchers to explore newer problems/areas and collaborate on them, and for younger researchers to start working in these areas. All are welcome to join. Best regards, Organizers, IARCS Verification Seminar Series ============================================================= Title: Resolving Nondeterminism by Chance Meeting Link: https://us02web.zoom.us/j/89164094870?pwd=eUFNRWp0bHYxRVpwVVNoVUdHU0djQT09 (Meeting ID: 891 6409 4870, Passcode: 082194) Abstract: History-deterministic automata are those in which nondeterministic choices can be correctly resolved stepwise: there is a strategy to select a continuation of a run given the next input letter so that if the overall input word admits some accepting run, then the constructed run is also accepting. The notion of History Determinism (sometimes known as Good for Games) was introduced by Henzinger and Piterman in 2006 motivated by applications in reactive synthesis. Later, it has been studied for several models such as Pushdown systems, Timed automata, Vector Addition systems, etc. Motivated by checking qualitative properties in probabilistic verification, we introduce the setting where the resolver strategy can randomize and only needs to succeed with lower-bounded probability. In this talk, I will present our work on stochastic resolution of nondeterministic automata. I will discuss the expressiveness of stochastically-resolvable automata as well as our complexity results for deciding stochastic resolvability. In particular, we show that it is undecidable to check if a given NFA is stochastically resolvable with a given threshold. The problem however becomes decidable for the class of finitely-ambiguous automata. We also consider the related question of deciding whether an automata is resolvable with any positive threshold. We show that this problem is decidable for automata over unary alphabet as well as for finitely-ambiguous automata. I will present our complexity results for several well-studied classes of automata and also discuss natural extensions of some of these results to automata for omega regular languages. I will conclude with some interesting open questions. This is based on joint work with David Purser, Sven Schewe, Qiyi Tang, Patrick Totzke and Di-de Yen. Bio: Soumyajit Paul is currently a post-doctoral researcher at University of Liverpool, working primarily with Sven Schewe. His research interests encompasses algorithmic game theory, probabilistic systems and formal methods. Earlier, he was a teaching and research fellow at Université Paris Cité, affiliated to IRIF. He did his PhD at LaBRI, Université de Bordeaux under the supervision of Hugo Gimbert and B. Srivathsan. His PhD research work focussed on the complexity of equilibrium computations in games where players may have imperfect information. Prior to his PhD, he completed his undergraduate and master's studies at Chennai Mathematical Institute.

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IARCS Verification Seminar Series -- Talk by Soumyajit Paul on Sept. 16 at 1900 hrs IST
by VSS IARCS 12 Sep '25

12 Sep '25

Dear all, The next talk in the IARCS Verification Seminar Series will be given by Soumyajit Paul, a post-doctoral researcher at the University of Liverpool. The talk is scheduled on Tuesday, September 16, at 1900 hrs IST (add to Google calendar <https://calendar.google.com/calendar/event?action=TEMPLATE&tmeid=M2EzajE4cT…> ). The details of the talk can be found on our webpage ( https://fmindia.cmi.ac.in/vss/) and also appended to the body of this email. The Verification Seminar Series, an initiative by the Indian Association for Research in Computing Science (IARCS), is a monthly, online talk-series, broadly in the area of Formal Methods and Programming Languages, with applications in Verification and Synthesis. The aim of this talk-series is to provide a platform for Formal Methods researchers to interact regularly. In addition, we hope that it will make it easier for researchers to explore newer problems/areas and collaborate on them, and for younger researchers to start working in these areas. All are welcome to join. Best regards, Organizers, IARCS Verification Seminar Series ============================================================= Title: Resolving Nondeterminism by Chance Meeting Link: https://us02web.zoom.us/j/89164094870?pwd=eUFNRWp0bHYxRVpwVVNoVUdHU0djQT09 (Meeting ID: 891 6409 4870, Passcode: 082194) Abstract: History-deterministic automata are those in which nondeterministic choices can be correctly resolved stepwise: there is a strategy to select a continuation of a run given the next input letter so that if the overall input word admits some accepting run, then the constructed run is also accepting. The notion of History Determinism (sometimes known as Good for Games) was introduced by Henzinger and Piterman in 2006 motivated by applications in reactive synthesis. Later, it has been studied for several models such as Pushdown systems, Timed automata, Vector Addition systems, etc. Motivated by checking qualitative properties in probabilistic verification, we introduce the setting where the resolver strategy can randomize and only needs to succeed with lower-bounded probability. In this talk, I will present our work on stochastic resolution of nondeterministic automata. I will discuss the expressiveness of stochastically-resolvable automata as well as our complexity results for deciding stochastic resolvability. In particular, we show that it is undecidable to check if a given NFA is stochastically resolvable with a given threshold. The problem however becomes decidable for the class of finitely-ambiguous automata. We also consider the related question of deciding whether an automata is resolvable with any positive threshold. We show that this problem is decidable for automata over unary alphabet as well as for finitely-ambiguous automata. I will present our complexity results for several well-studied classes of automata and also discuss natural extensions of some of these results to automata for omega regular languages. I will conclude with some interesting open questions. This is based on joint work with David Purser, Sven Schewe, Qiyi Tang, Patrick Totzke and Di-de Yen. Bio: Soumyajit Paul is currently a post-doctoral researcher at University of Liverpool, working primarily with Sven Schewe. His research interests encompasses algorithmic game theory, probabilistic systems and formal methods. Earlier, he was a teaching and research fellow at Université Paris Cité, affiliated to IRIF. He did his PhD at LaBRI, Université de Bordeaux under the supervision of Hugo Gimbert and B. Srivathsan. His PhD research work focussed on the complexity of equilibrium computations in games where players may have imperfect information. Prior to his PhD, he completed his undergraduate and master's studies at Chennai Mathematical Institute.

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RHPL@FSTTCS 2025: Third Call for Talk and Poster Proposals | Deadline: September 18
by abhisekh.sankaran＠tcs.com 12 Sep '25

12 Sep '25

============================================================= RHPL@FSTTCS 2025: Workshop on Research Highlights in Programming Languages December 2025, BITS Goa, co-located with FSTTCS 2025 Website: https://fmindia.cmi.ac.in/rhpl2025/ Submission link: https://forms.gle/RufuAs54zxsadp1n7 Submission deadline: September 18, 2025 IST ============================================================= Dear colleague, As you may know, FSTTCS 2025 (https://www.fsttcs.org.in/2025/) is going to be held at BITS Pilani, K K Birla Goa Campus (https://www.bits-pilani.ac.in/goa/) during December 17 – 19, 2025. The conference is organized by IARCS, the Indian Association for Research in Computing Science (https://www.iarcs.org.in/) in association with ACM India (https://india.acm.org/) It is a very visible forum for presenting original results in foundational aspects of Computer Science and Software Technology. As in the previous years, this year too, co-located with the main FSTTCS conference, IARCS is organizing the Workshop on Research Highlights in Programming Languages (RHPL@FSTTCS). The focus of the workshop will be on all areas of Programming Languages (PL), including but not limited to: - Applied formal methods - Automated and interactive theorem provers - Compilers - Concurrency and memory models - Domain and type theories - Program analysis and verification - Program sketching, synthesis and repair - Programming language design and semantics Further, in view of the increasing role of Artificial Intelligence (AI) and Machine Learning (ML) in PL theory and practice, the workshop also includes in its scope themes pertaining to the influences of AI/ML concepts and tools on the mentioned PL topics, and vice-versa; for instance, probabilistic programming languages. The website for the workshop is: https://fmindia.cmi.ac.in/rhpl2025/. The objective of RHPL is to foster interactions between the attendees of the workshop, and more broadly between researchers working on Programming Languages and the traditional FSTTCS community of researchers working on Theoretical Computer Science and Formal Methods. We solicit: (1) Talk proposals: On recent work that has been published in good venues, or is mature in terms of approach and evaluation. (2) Poster proposals: On early ideas that are promising but have not been developed fully. Selections of these proposals will be made based on the promise of research possibilities and their novelty. Proposals to the workshop can be based on one or more works, published or unpublished. They may be submitted using the Google form below. https://forms.gle/RufuAs54zxsadp1n7 The important dates for the workshop are as below. All dates are in Indian Standard Time (IST). - Submission portal opens: July 28, 2025 - Submission deadline: September 18, 2025 - Notification: September 25, 2025 - Early registration deadline: TBA - RHPL@FSTTCS: TBA We look forward to receiving your talk/poster proposals to the workshop. On behalf of the RHPL@FSTTCS workshop organizing committee: Abhisekh Sankaran (TCS Research) (co-Chair) Divyesh Unadkat (Synopsys) (co-Chair) Deepak D'Souza (IISc Bangalore) Uday Khedker (IIT Bombay) Kumar Madhukar (IIT Delhi) Kartik Nagar (IIT Madras) Sumanth Prabhu (TCS Research) Ganesan Ramalingam (Microsoft) Abhik Roychoudhury (National University of Singapore)

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MMAC Workshop (co-located with ATVA 2025): Call for participation and poster submission
by VSS IARCS 08 Sep '25

08 Sep '25

Dear all, We invite you to participate in MMAC 2025 (https://mmautomata.github.io/) — a post-conference of ATVA 2025 (https://conf.researchr.org/home/atva-2025) on Milestones and Motifs in Automata and Concurrency. This workshop is going to be held at IIIT Bangalore, on October 31, 2025. The registration for the workshop is open; the early bird registration deadline ends on September 30th. Here is the link to register: https://conf.researchr.org/attending/atva-2025/registration MMAC 2025 will also host a Poster Session ( https://mmautomata.github.io/#poster) -- a forum for students, faculty and industry practitioners working in the broad area of automated analysis, synthesis, and verification of hardware and software systems, including but not limited to automata, concurrency and timed systems, to present their research work to the workshop attendees. Early-stage ideas are more than welcome. We anticipate it to be an excellent opportunity to get feedback, and network with peers and experts in the field. Note that there will be no proceedings for this workshop and thus the shortlisted posters would not be a part of any formal proceedings. If you are interested in presenting a poster, please submit an entry using this Google form (https://forms.gle/r2WiAHVQWtX7s1v39) The submission deadline is September 25th. Shortlisted entries will be notified by September 28th. The poster presentation would only be an in-person event; an author of every shortlisted poster would be expected to register for MMAC 2025 (https://conf.researchr.org/attending/atva-2025/registration) and present the poster at the workshop. We look forward to your participation. Needless to say, we'd be very happy to clarify any questions you might have in this regard. If you have any queries, please write to the organisers at mmautomata2025(a)gmail.com. Best regards, C. Aiswarya (Chennai Mathematical Institute) S. Akshay (IIT Bombay) Kumar Madhukar (IIT Delhi)

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DataMod 2025 - Final Call for Papers, Extended Deadline
by Ouadie Khebbeb 26 Aug '25

26 Aug '25

DataMod 2025 - 13th International Symposium "From Data to Models and Back" Toledo, Spain, 10-11 November 2025 Website: https://datamod-symposium.github.io/DataMod-2025/ DataMod 2025 is a satellite event of the 23rd International Conference of Software Engineering and Formal Methods (SEFM 2025): https://sefm-conference.github.io/2025/ -------------------------------------------------------------------------------- Paper submission deadline (extended): 10 September 2025 -------------------------------------------------------------------------------- CONTEXT & OBJECTIVES DataMod 2025 aims at bringing together practitioners and researchers from academia, industry and research institutions interested in the combined computational modelling methods with data-driven techniques from the areas of knowledge management, data mining and machine learning. Modelling methodologies of interest include automata, agents, Petri nets, process algebras and rewriting systems. Application domains include social systems, ecology, biology, medicine, smart cities, governance, security, education, software engineering, and any other field that deals with complex systems and large amounts of data. Papers can present research results in any of the themes of interest for the symposium, as well as application experiences, tools and promising preliminary ideas. Papers dealing with synergistic approaches that integrate modelling and knowledge management/discovery, or that exploit knowledge management/discovery to develop/synthesise system models are especially welcome. Authors are invited to submit original research or tool papers on any relevant topic. These can either be normal or short papers. Short papers can discuss new ideas which are at an early stage of development and which have not yet been thoroughly evaluated. TOPICS Modelling and analysis methodologies include: - Agent-based Methodologies - Automata-based Notations - Big Data Analytics - Cellular Automata - Classification - Clustering, Segmentation and Profiling - Conformance Analysis - Constraint Programming - Data Mining - Differential Equations - Game Theory - Machine Learning - Membrane Systems - Network Theory and Analysis - Ontologies - Optimisation Modelling - Petri Nets - Process Calculi - Process Mining - Rewriting Systems - Spatio-temporal Data Analysis/Mining - Statistical Model Checking - Text Mining - Topological Data Analysis Application domains include: - Biology - Brain Data and Simulation - Business Process Management - Climate Change - Cybersecurity - Ecology - Education - Environmental Risk Assessment and Management - Enterprise Architectures - Epidemiology - Genetics and Genomics - Governance - HCI and Human Behaviour - Open Source Software Development and Communities - Pharmacology - Resilience Engineering - Safety and Security Risk Assessment - Social Good - Social Software Engineering - Social Systems - Sustainable Development - Threat Modelling and Analysis - Urban Ecology - Smart Cities and Smart Lands Synergistic approaches include: (1) Use of modelling methods and notations in a knowledge management/discovery context (2) Development and use of common modelling and knowledge management/discovery frameworks to explore and understand complex systems from the application domains of interest SUBMISSION AND PUBLICATION Papers can take one of the following three types: - regular (research, tool or position) paper, up to 16 pages (excluding references) - short (research, tool or position) paper, up to 8 pages (excluding references) - presentation report, up to 4 pages Presentation reports concern recent or ongoing work on relevant topics and ideas, for timely discussion and feedback at the workshop. There is no restriction as to previous/future publication of the contents of a presentation. Typically, a presentation is based on a paper which recently appeared (or which is going to appear) in the proceedings of another recognised conference, or which has not yet been submitted. Presentation reports will receive a lightweight review to establish their relevance for DataMod. All submissions must be original, unpublished, and not submitted concurrently for publication elsewhere. Authors are invited to submit their presentation report via Easychair https://easychair.org/conferences/?conf=datamod2025 Papers must be formatted according to the guidelines for Springer LNCS papers, without modifications of margins and other space-saving measures. Authors should therefore consult Springer's authors' instructions and use their proceedings templates, either for LaTeX or for Word, for the preparation of their papers. Springer’s proceedings LaTeX templates are also available in Overleaf. Springer encourages authors to include their ORCIDs in their papers. Each paper will be reviewed by three Program Committee members. Notification and reviews will be communicated via email through the Easychair platform. Accepted papers (both regular and short) will be included in a dedicated LNCS post-proceedings volume published by Springer after the Symposium. Condition for inclusion in the proceedings is that at least one of the co-authors attends and presents the paper at the Symposium. IMPORTANT DATES - Research Papers Abstract submission deadline (optional): 22 August 2025 Paper submission deadline (extended): 10 September 2025 Acceptance notification: 30 September 2025 Revised version: 7 October 2025 Symposium: 10-11 November 2025 Note that you will have the opportunity to submit the camera-ready paper for the LNCS Proceedings with discussions and remarks after the symposium, i.e., by the end of the year or early Jan/26. PROGRAM CO-CHAIRS * Livia Lestingi, Politecnico di Milano, Italy * Gwen Salaün, Université Grenoble Alpes, France PUBLICITY CHAIRS * Ouadie Khebbeb, Université de Grenoble Alpes, France STEERING COMMITTEE * Oana Andrei, University of Glasgow, UK * Antonio Cerone, Nazarbayev University, Kazakhstan * Riccardo Guidotti, University of Pisa, Italy * Marijn Janssen, Delft University of Technology, the Netherlands * Stan Matwin, University of Ottawa, Canada * Paolo Milazzo, University of Pisa, Italy * Anna Monreale, University of Pisa, Italy PROGRAM COMMITTEE * Oana Andrei, University of Glasgow * Kyungmin Bae, Pohang University of Science and Technology (POSTECH) * Juliana Bowles, School of Computer Science, University of St Andrews * Giovanna Broccia, ISTI-CNR, FMT Lab * Antonio Cerone, Nazarbayev University * Robert Clarisó, Universitat Oberta de Catalunya * Carla Ferreira, Universidade NOVA de Lisboa * Marc Frappier, Université de Sherbrooke * Elisa Gonzalez Boix, Vrije Universiteit Brussel * Riccardo Guidotti, University of Pisa * Alexander Kocian, University of Pisa * Ricardo M. Czekster, Aston University * José Machado, University of Minho, DI, ALGORITMI/LASI * Paolo Milazzo, Dipartimento di Informatica - Università di Pisa * Pedro Ribeiro, University of York * Arpit Sharma, Indian Institute of Science Education and Research * Volker Stolz, Høgskulen på Vestlandet * Martin Tappler, TU Wien * Thais Webber, Aston University * Lina Ye, CentraleSupélec, LMF, University Paris-Saclay, France CONTACT > All inquiries should be sent to datamod2025(a)easychair.org

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Registrations open for India's first Compiler Technology Hackathon!
by Uday Khedker 25 Aug '25

25 Aug '25

As a part of the upcoming*Innovations In Compiler Technology 2025* (IICT 2025) workshop, we invite you to participate in SEGFAULT, a first of a kind Compiler Technology themed hackathon! *Website *: https://segfault.compilertech.org/ *Registrations Close Date* : 29th August 2025. The first round of SEGFAULT is completely online, with the finale being co-located and held as a part of IICT 2025. Top 6 teams will get a chance to present their work to Industry and Academic experts, along with the 350 strong audience at IICT. *Themes *: - Domain Specific Languages and Compilers - Compiler Frameworks and Tools - Compilers and AI/ML - Optimizations for the Real World - Explainable Compilers - Compilers for New Paradigms Registration is free and requires forming a team of 1 - 4 members along with an abstract of the proposed solution on the Hackathon website. Participants can also submit projects that are already complete, as long as they are relevant to Compilers and is their own work. For any queries, email support(a)compilertech.org or ashutosh(a)compilertech.org. Regards, IICT Organizing Committee -- signature.html ------------------------------------------------------------------------ Dr. Uday Khedker, Professor Department of Computer Science & Engg. IIT Bombay, Powai, Mumbai 400 076, India. Email : uday(a)cse.iitb.ac.in Homepage: http://www.cse.iitb.ac.in/~uday Phone : 91 (22) 2572 2545 x 7717, 91 (22) 2576 7717 (Direct)

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Call for Presentations || IICT 2025
by Uday Khedker 25 Aug '25

25 Aug '25

2nd Workshop on Innovations In Compiler Technology (IICT) ========================================================== Call for Presentation Proposals ------------------------------- The 2nd workshop on Innovations In Compiler Technology (IICT) aims to bring together researchers, practitioners, and enthusiasts in the field of compiler technologies. The first workshop was held in Bengaluru on 28 and 29 September 2024. This edition of IICT is being held as an ACM Meetup in collaboration with iSoft on 27 and 28 September 2025 at Indian Institute of Science (IISc) Bengaluru. More details about the workshop can be found athttps://compilertech.org/. IICT focuses on the cutting-edge advancements in design, implementation, and optimization of compiler techniques as well as their applications on emerging software and hardware platforms. We invite speakers from academia and industry to present their work related to programming languages and compilers. We invite presentations on all aspects of compilers covering the classical compiler techniques, compilers for AI/ML, DSLs, Web3, blockchains etc. Proposals should provide sufficient information for the program committee to be able to judge the quality of the submission. Proposals can be submitted under the form of an extended abstract, full paper, or slides. The selections will happen in two steps: In the first step, a conditional acceptance will be provided. The second step requires the participants of conditionally accepted proposals to submit a ninety seconds video of their presentation which will be displayed as a teaser on the workshop website. The final acceptance will be provided based on the evaluation of the video presentations. Some of the proposals may be accepted for posters rather than conventional presentations. Important dates: Submissions Open 1 June 2025 Submission Deadline 1 July 2025 Notification of Conditional Acceptance 7 August 2025 Submission of 90 second video 15 August 2025 Final Notification 1 September 2025 Workshop Dates 27, 28 September 2025 Link for submission: https://easychair.org/my/conference?conf=compilertech2025. Who should attend? - Practitioners of compilers. - Students and Researchers in the field of compilers, programming languages, and runtime. - Those interested in using compiler and toolchain technology in novel and interesting ways. Uday Khedker (IIT Bombay) Aditya Kumar (Google) Program Chair Organizing Chair -- signature.html ------------------------------------------------------------------------ Dr. Uday Khedker, Professor Department of Computer Science & Engg. IIT Bombay, Powai, Mumbai 400 076, India. Email : uday(a)cse.iitb.ac.in Homepage: http://www.cse.iitb.ac.in/~uday Phone : 91 (22) 2572 2545 x 7717, 91 (22) 2576 7717 (Direct)

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RHPL@FSTTCS 2025: Second Call for Talk and Poster Proposals
by abhisekh.sankaran＠tcs.com 20 Aug '25

20 Aug '25

============================================================= RHPL@FSTTCS 2025: Workshop on Research Highlights in Programming Languages December 2025, BITS Goa, co-located with FSTTCS 2025 Website: https://fmindia.cmi.ac.in/rhpl2025/ Submission deadline: September 18, 2025 ============================================================= Dear colleague, As you may know, FSTTCS 2025 (https://www.fsttcs.org.in/2025/) is going to be held at BITS Pilani, K K Birla Goa Campus (https://www.bits-pilani.ac.in/goa/) during December 17 – 19, 2025. The conference is organized by IARCS, the Indian Association for Research in Computing Science (https://www.iarcs.org.in/) in association with ACM India (https://india.acm.org/) It is a very visible forum for presenting original results in foundational aspects of Computer Science and Software Technology. As in the previous years, this year too, co-located with the main FSTTCS conference, IARCS is organizing the Workshop on Research Highlights in Programming Languages (RHPL@FSTTCS). The focus of the workshop will be on all areas of Programming Languages (PL), including but not limited to: - Applied formal methods - Automated and interactive theorem provers - Compilers - Concurrency and memory models - Domain and type theories - Program analysis and verification - Program sketching, synthesis and repair - Programming language design and semantics Further, in view of the increasing role of Artificial Intelligence (AI) and Machine Learning (ML) in PL theory and practice, the workshop also includes in its scope themes pertaining to the influences of AI/ML concepts and tools on the mentioned PL topics, and vice-versa; for instance, probabilistic programming languages. The website for the workshop is: https://fmindia.cmi.ac.in/rhpl2025/. The objective of RHPL is to foster interactions between the attendees of the workshop, and more broadly between researchers working on Programming Languages and the traditional FSTTCS community of researchers working on Theoretical Computer Science and Formal Methods. We solicit: (1) Talk proposals: On recent work that has been published in good venues, or is mature in terms of approach and evaluation. (2) Poster proposals: On early ideas that are promising but have not been developed fully. Selections of these proposals will be made based on the promise of research possibilities and their novelty. Proposals to the workshop can be based on one or more works, published or unpublished. They may be submitted using the Google form below. https://forms.gle/RufuAs54zxsadp1n7 The important dates for the workshop are as below. All dates are in Indian Standard Time (IST). - Submission portal opens: July 28, 2025 - Submission deadline: September 18, 2025 - Notification: September 25, 2025 - Early registration deadline: TBA - RHPL@FSTTCS: TBA We look forward to receiving your talk/poster proposals to the workshop. On behalf of the RHPL@FSTTCS workshop organizing committee: Abhisekh Sankaran (TCS Research) (co-Chair) Divyesh Unadkat (Synopsys) (co-Chair) Deepak D'Souza (IISc Bangalore) Uday Khedker (IIT Bombay) Kumar Madhukar (IIT Delhi) Kartik Nagar (IIT Madras) Sumanth Prabhu (TCS Research) Ganesan Ramalingam (Microsoft) Abhik Roychoudhury (National University of Singapore)

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