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Call for Papers: TWEB Special Issue on the Agentic Web
by Yacine Sam 12 Sep '26

12 Sep '26

[Apologies for multiple postings] [ https://maestro.acm.org/trk/click?ref=z16l2snue3_2-32027_0_0x332a2ax029886 | ACM Digital Library ] [ https://maestro.acm.org/trk/click?ref=z16l2snue3_2-32027_0_0x33ae5dx029886 ] CALL FOR PAPERS ACM Transactions on the Web Special Issue on the Agentic Web Guest Editors [ https://maestro.acm.org/trk/click?ref=z16l2snue3_2-32027_0_0x348099x029886 | Boualem Benatallah ] , Dublin City University, Ireland [ https://maestro.acm.org/trk/click?ref=z16l2snue3_2-32027_0_0x34809ax029886 | Pradyumna Chari ] , Massachusetts Institute of Technology, MA, USA [ https://maestro.acm.org/trk/click?ref=z16l2snue3_2-32027_0_0x34809bx029886 | Ramesh Raskar ] , Massachusetts Institute of Technology, MA, USA [ https://maestro.acm.org/trk/click?ref=z16l2snue3_2-32027_0_0x34809cx029886 | Yacine Sam ] , University of Tours, France This special issue explores the emerging foundations, architectures, protocols, evaluation methodologies, and broader social, economic, regulatory, and sustainability implications of the Agentic Web, where billions of AI agents can discover, communicate, and coordinate across open Web environments. It aims to bring together researchers and practitioners to advance the understanding, governance, and deployment of the agentic Web. [ https://maestro.acm.org/trk/click?ref=z16l2snue3_2-32027_0_0x34809dx029886 | Click here for the full Call for Papers and submission instructions. ] Important Dates Submissions deadline: September 30, 2026 First-round review decisions: November 30, 2026 Deadline for revision submissions: December 31, 2026 Notification of final decisions: February 28, 2027 Tentative publication: Spring 2027 For questions and further information, please contact Yacine Sam ( [ https://maestro.acm.org/trk/click?ref=z16l2snue3_2-32027_0_0x34809ex029886 | yacine.sam(a)univ-tours.fr ] ). As of January 1, 2026, ACM has become a fully [ https://maestro.acm.org/trk/click?ref=z16l2snue3_2-32027_0_0x3454d0x029886 | Open Access ] Publisher. Open Access will enable ACM authors to gain a competitive edge in visibility, impact, and global reach. Please visit the TWEB Open Access [ https://maestro.acm.org/trk/click?ref=z16l2snue3_2-32027_0_0x34809fx029886 | page ] for information on the transition plan including APC rates, waivers and discounts. [ https://maestro.acm.org/trk/click?ref=z16l2snue3_2-32027_0_0x3454e0x029886 | Sign up for TWEB TOC alerts. ] [ https://maestro.acm.org/trk/click?ref=z16l2snue3_2-32027_0_0x3454e1x029886 | https://tweb.acm.org ] [ https://maestro.acm.org/trk/click?ref=z16l2snue3_2-32027_0_0x343866x029886 | Become an ACM Certified Reviewer. ] You are subscribed with: yacine.sam(a)univ-tours.fr [ https://optout.acm.org/unsubscribe.cfm?re=yacine.sam@univ-tours.fr&rl=CFP | Unsubscribe ] The call-for-papers(a)hq.acm.org email address is not monitored. Please do not reply to it directly. Association for Computing Machinery 1601 Broadway, 10th Floor, New York, NY 10019 [ https://maestro.acm.org/trk/click?ref=z16l2snue3_2-32027_0_0x3477cfx029886 ] Connect with us: [ https://www.linkedin.com/showcase/acmdl/ ] [ https://bsky.app/profile/acm.org ] [ https://substack.com/@theofficialacm? ] [ https://www.acm.org/binaries/content/gallery/images-mail/wechat-qr-code.png ] -- Yacine Sam Associate-Professor Computer Science Lab., DI, Faculté S&T Tours University, France Bâtiment L, Bureau L 3170, 3ème Étage Parc de Grandmont - 37200 TOURS +33(0)2 47 36 70 17 yacine.sam(a)univ-tours.fr

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IARCS Verification Seminar Series -- Talk by Ramneet Singh on September 11 at 1500 hrs IST
by VSS IARCS 10 Sep '26

10 Sep '26

Dear all, The next talk in the IARCS Verification Seminar Series will be given by Ramneet Singh, an AI Researcher at Proximal, working on synthetic RL environment generation for post-training of LLMs. The talk is scheduled on Friday, September 11, at 1500 hrs IST (add to Google calendar <https://calendar.google.com/calendar/event?action=TEMPLATE&tmeid=M2VlN3A2ZD…> ). The details of the talk can be found on our webpage ( https://fmindia.cmi.ac.in/vss/) and also appended to the body of this email. The Verification Seminar Series, an initiative by the Indian Association for Research in Computing Science (IARCS), is a monthly, online talk-series, broadly in the area of Formal Methods and Programming Languages, with applications in Verification and Synthesis. The aim of this talk-series is to provide a platform for Formal Methods researchers to interact regularly. In addition, we hope that it will make it easier for researchers to explore newer problems/areas and collaborate on them, and for younger researchers to start working in these areas. All are welcome to join. Best regards, Organizers, IARCS Verification Seminar Series ============================================================= Title: INTERLEAVE: A Faster Symbolic Algorithm for Maximal End Component Decomposition Meeting Link: https://us02web.zoom.us/j/89164094870?pwd=eUFNRWp0bHYxRVpwVVNoVUdHU0djQT09 (Meeting ID: 891 6409 4870, Passcode: 082194) Abstract: The talk presents a novel symbolic algorithm for the Maximal End Component (MEC) decomposition of a Markov Decision Process (MDP). The key idea behind our algorithm INTERLEAVE is to interleave the computation of Strongly Connected Components (SCCs) with eager elimination of redundant state-action pairs, rather than performing these computations sequentially as done by existing state-of-the-art algorithms. Even though our approach has the same complexity as prior works, an empirical evaluation of INTERLEAVE on the standardized Quantitative Verification Benchmark Set demonstrates that it solves 19 more benchmarks (out of 379) than the closest previous algorithm. On the 149 benchmarks that prior approaches can solve, we demonstrate a 3.81x average speedup in runtime. Bio: Ramneet is currently an AI Researcher at Proximal, working on synthetic RL environment generation for post-training of LLMs. Prior to this, he was a Research Fellow at Microsoft Research India, working on AI agents for large-scale software engineering tasks. He acquired a background in formal methods at IIT Delhi and Georgia Tech, where the work being presented was done as part of his Master's Thesis. He loves thinking about how to formally specify system behaviour and believes it has become even more important today.

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IARCS Instructional Schools in Computer Science - Call for Proposals
by B Srivathsan 08 Sep '26

08 Sep '26

Dear All, IARCS is inviting proposals for "Instructional Schools in Computer Science". More details here: Poster: https://www.iarcs.org.in/activities/iarcs-course-proposals-poster-sep2026.h… Website: https://www.iarcs.org.in/activities/courses.php Deadline: September 25, 2026 Do consider submitting a proposal! We'd appreciate if you could help publicize the programme by sharing the links with your contacts. Best, Srivathsan On behalf of: Arpit Agarwal (IIT Bombay), Meghana Nasre (IIT Madras), Rajat Mittal (IIT Kanpur), Rohit Gurjar (IIT Bombay), Vaishnavi Sundararajan (IIT Delhi) IARCS Instructional School Committee

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IARCS Verification Seminar Series -- Talk by Ramneet Singh on September 11 at 1500 hrs IST
by VSS IARCS 05 Sep '26

05 Sep '26

Dear all, The next talk in the IARCS Verification Seminar Series will be given by Ramneet Singh, an AI Researcher at Proximal, working on synthetic RL environment generation for post-training of LLMs. The talk is scheduled on Friday, September 11, at 1500 hrs IST (add to Google calendar <https://calendar.google.com/calendar/event?action=TEMPLATE&tmeid=M2VlN3A2ZD…> ). The details of the talk can be found on our webpage ( https://fmindia.cmi.ac.in/vss/) and also appended to the body of this email. The Verification Seminar Series, an initiative by the Indian Association for Research in Computing Science (IARCS), is a monthly, online talk-series, broadly in the area of Formal Methods and Programming Languages, with applications in Verification and Synthesis. The aim of this talk-series is to provide a platform for Formal Methods researchers to interact regularly. In addition, we hope that it will make it easier for researchers to explore newer problems/areas and collaborate on them, and for younger researchers to start working in these areas. All are welcome to join. Best regards, Organizers, IARCS Verification Seminar Series ============================================================= Title: INTERLEAVE: A Faster Symbolic Algorithm for Maximal End Component Decomposition Meeting Link: https://us02web.zoom.us/j/89164094870?pwd=eUFNRWp0bHYxRVpwVVNoVUdHU0djQT09 (Meeting ID: 891 6409 4870, Passcode: 082194) Abstract: The talk presents a novel symbolic algorithm for the Maximal End Component (MEC) decomposition of a Markov Decision Process (MDP). The key idea behind our algorithm INTERLEAVE is to interleave the computation of Strongly Connected Components (SCCs) with eager elimination of redundant state-action pairs, rather than performing these computations sequentially as done by existing state-of-the-art algorithms. Even though our approach has the same complexity as prior works, an empirical evaluation of INTERLEAVE on the standardized Quantitative Verification Benchmark Set demonstrates that it solves 19 more benchmarks (out of 379) than the closest previous algorithm. On the 149 benchmarks that prior approaches can solve, we demonstrate a 3.81x average speedup in runtime. Bio: Ramneet is currently an AI Researcher at Proximal, working on synthetic RL environment generation for post-training of LLMs. Prior to this, he was a Research Fellow at Microsoft Research India, working on AI agents for large-scale software engineering tasks. He acquired a background in formal methods at IIT Delhi and Georgia Tech, where the work being presented was done as part of his Master's Thesis. He loves thinking about how to formally specify system behaviour and believes it has become even more important today.

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CPP 2027 - Abstract Submission Deadline Approaching (Sep 3, 2026)
by Abhishek Kr Singh 27 Aug '26

27 Aug '26

*CPP 2027: *16th International Conference on Certified Programs and Proofs January 11 - 12, 2027 Mexico City, Mexico (Co-located with POPL 2027) https://popl27.sigplan.org/home/CPP-2027 Abstract Submission Deadline: September 3, 2026 AoE Paper Submission Deadline: September 10, 2026 AoE Author notifications: November 10, 2026 CPP 2027 Conference: January 11-12, 2027 CPP 2027 is an international conference on practical and theoretical topics in all areas that consider formal verification and certification as an essential paradigm for their work. CPP spans areas of computer science, mathematics, logic, and education. CPP 2027 is sponsored by ACM SIGPLAN, in cooperation with ACM SIGLOG. CPP 2027 will be held on January 11–12, 2027, co-located with POPL 2027 in Mexico City, Mexico. CPP 2027 welcomes contributions from all members of the community. It is primarily an in-person event, and at least one author of every accepted paper is expected to attend in person. The organizers aim to support remote participation, with talks recorded and streamed online depending on AV support from the POPL 2027 organizers. *List of Topics* We welcome submissions in research areas related to formal certification of programs and proofs. Topics of interest include, but are not limited to, the following: * Certified or certifying programming, compilation, linking, OS kernels, runtime systems, security monitors, and hardware * Certified mathematical libraries and mathematical theorems * Proof assistants (e.g., ACL2, Agda, Dafny, F*, HOL4, HOL Light, Idris, Isabelle, Lean, Mizar, Nuprl, PVS, Rocq, etc.) * New languages and tools for certified programming * Program analysis, program verification, and program synthesis * Program logics, type systems, and semantics for certified code * Logics for certifying concurrent and distributed systems * Mechanized metatheory, formalized programming language semantics, and logical frameworks * Higher-order logics, dependent type theory, proof theory, logical systems, separation logics, and logics for security * Verification of correctness and security properties * Certificates for decision procedures, including linear algebra, polynomial systems, SAT, SMT, and unification in algebras of interest * Certificates for semi-decision procedures, including equality, first-order logic, and higher-order unification * Certificates for program termination * Formal models of computation * Mechanized (un)decidability and computational complexity proofs * Formally certified methods for induction and coinduction * Integration of interactive and automated provers * Logical foundations of proof assistants * Applications of AI and machine learning to formal verification * User interfaces for proof assistants and theorem provers * Teaching mathematics and computer science with proof assistants *Conference Co-Chairs* * Sophie Tourret (Inria) * Yannick Zakowski (Inria) *Programme Committee Co-Chairs* * Cyril Cohen (Inria) * Nikhil Swamy (Microsoft Research) *Programme Committee* Aart Middeldorp [University of Innsbruck] Abhishek Singh [IIIT Hyderabad] Anders Mörtberg [Stockholm University] Andrej Bauer [University of Ljubljana] Anne Baanen [Mathlib Initiative] Ariel Kellison [Code Metal] Assia Mahboubi [Inria, VU Amsterdam] Chantal Keller [Université Paris-Saclay] Chelsea Edmonds [University of Western Australia] Christine Rizkallah [University of Melbourne] Cyril Cohen [Inria] (co-chair) Denis Firsov [Tallinn University of Technology] Derek Dreyer [MPI-SWS] Dmitriy Traytel [University of Copenhagen] Dominik Kirst [Inria] Holger Thies [Kyoto University] Ian Shillito [University of Melbourne] Jannis Limperg [Axiom Math] Jonas Kastberg Hinrichsen [Aalborg University] Julie Cailler [University of Lorraine, CNRS, Inria, LORIA] Julien Narboux [Université Paris Cité] Kathrin Stark [Heriot-Watt University] Kaustuv Chaudhuri [Inria Saclay, École Polytechnique] Kenji Maillard [Inria, University of Nantes] Lauren M. White [NASA] Lawrence C. Paulson [University of Cambridge] María Inés de Frutos-Fernández [University of Bonn] Martin Bodin [Inria] Matthieu Sozeau [Inria] Mauricio Ayala-Rincón [University of Brasília, Federal University of Goiás] Nada Amin [Harvard University] Nikhil Swamy [Microsoft Research] (co-chair) Patricia Johann [Appalachian State University] Qinxiang Cao [Shanghai Jiao Tong University] René Thiemann [University of Innsbruck] Reynald Affeldt [AIST] Sébastien Gouëzel [Université de Rennes] Simon Oddershede Gregersen [CISPA Helmholtz Center for Information Security] Sophie Morel [CNRS] Stefan Zetsche [AWS] Stéphane Graham-Lengrand [SRI] Tobias Nipkow [TU Munich] Viktor Vafeiadis [MPI-SWS] Xavier Allamigeon [Inria, École polytechnique] Yann Herklotz [EPFL] Yannick Forster [Inria] Yao Li [Portland State] Yonghyun Kim [MPI-SP] *Submission link:* https://popl27.sigplan.org/home/CPP-2027#Call-for-Papers *Author notifications*: November 10, 2026 -Regards. Abhishek Singh Software Engineering Research Centre IIIT Hyderabad. Home Page <https://sites.google.com/view/abhishek-singh/home> <http://www.tcs.tifr.res.in/people/students>

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ICLA 2027 - Submission deadline extended to September 3, 2026 AoE
by Sunil Simon 26 Aug '26

26 Aug '26

ICLA 2027: Indian Conference on Logic and its Applications January 6 - 8, 2027 The Indian Institute of Science (IISc), Bangalore, India https://conf.researchr.org/home/icla-2027 Extended submission deadline: September 3, 2026 AoE Submission link: https://easychair.org/conferences/?conf=icla2027 Notification to authors: October 31, 2026 --------------------------------------------------------------- ICLA 2027 is the 12th edition of the biennial conference organised by the Association for Logic in India (ALI). It serves as a forum that brings together researchers from a variety of disciplines in which formal logic plays a significant, and often foundational, role, including Mathematics, Computer Science, Philosophy, Linguistics, and Cognitive Science. A distinctive feature of ICLA is its inclusion of research on systems of logic in the Indian tradition, as well as historical studies of logic. Details of ICLA 2025 can be found here, and information about earlier editions of the conference is available on the ALI website. https://logicindia.org/icla/icla2025/ https://logicindia.org/ ICLA 2027 will be held at the Indian Institute of Science (IISc), Bangalore, from January 6–8, 2027. Pre-conference workshops will be held on January 5, 2027. List of Topics Topics of interest include, but are not limited to, the following. Interdisciplinary submissions are especially encouraged. Mathematical Logic and Foundations Algorithmic randomness, category theory, descriptive set theory, foundations of mathematics, homotopy type theory, logical aspects of topology, model theory, recursion theory, reverse mathematics, universal algebra. Modal, Epistemic, and Non-Classical Logics Belief change and revision, deontic logics, description logics, dynamic epistemic logic, first-order modal logic, formal epistemology, imperative logics, interaction of classical logic with other logics, many-valued logics and their applications, modal logic: algebraic, algorithmic, category-theoretic, and model-theoretic aspects, non-monotonic logics, paraconsistency, particular systems of logic, provability logics, normative reasoning. Logic in Computer Science Automata theory and logic, category theory in computer science, logic and algebraic methods, logic and concurrency, logic and games, logic and quantum computing, probabilistic logics and stochastic processes, transductions, two-variable logics, well-quasi-orders. Formal Methods, Verification, and Automated Reasoning Automated reasoning, decision procedures for logics, formal analysis of programs, formal verification and synthesis, hyperproperties, logic in industrial applications, logic in security and privacy, programming language semantics, real-time logics, software tools and systems for logic, theory and applications of SAT and SMT solvers and theorem provers. Finite Model Theory, Complexity, and Data Algorithmic metatheorems, comonads in finite model theory, definable functions on relational structures, logic and computational complexity, logic and constraint satisfaction problems, logic and databases, logic and graph structure theory, many-valued logics in finite model theory, proof complexity, stability theory over finite structures. Logic, Artificial Intelligence, and Multi-Agent Systems Logic and artificial intelligence, logic and machine learning, logical aspects of Large Language Models (LLMs), logic for information, logic for probability and uncertainty, logic in decision and game theory, logic and social choice theory, logic and social cognition, logic and social software, logics for multi-agent systems. History, Philosophy, Language, and Cognition History of logic: Indian, Chinese, and Western traditions and comparative studies, Indian philosophical systems: Buddhism, Jainism, Mīmāṃsā, and Nyāya, logic and cognitive science, logic and education, logic and ethics in artificial intelligence, logic and law, logic and linguistics, logic and metaphysics, logic and philosophy of mathematics, logic and philosophy of science, philosophical issues concerning logical systems, philosophy of language. Submission Authors are invited to submit papers presenting original and unpublished research in any area of logic and its applications. Submissions must be written in English and should provide sufficient detail to enable the Programme Committee to assess the merits of the work. Papers may not exceed 12 pages, excluding references, and must be prepared using the Springer-Verlag Lecture Notes LaTeX2e style: https://link.springer.com/series/558/information-for-authors-and-editors If necessary, detailed proofs of technical results may be included in a clearly marked appendix, which may be consulted at the discretion of the Programme Committee. Submissions must be in PDF format. All submissions must be made electronically through the EasyChair conference management system using the following link: https://easychair.org/conferences/?conf=icla2027 Simultaneous submission to journals or to other conferences with published proceedings is not permitted. Submitted papers will undergo peer review, and accepted papers will be published in the conference proceedings, which will be available at the time of the conference. The proceedings will appear as a volume in the FoLLI Publications on Logic, Language and Information, a subseries of Springer LNCS. To be included in the proceedings, at least one author of each accepted paper must commit to presenting the paper at the conference. Invited Speakers - Anuj Dawar (University of Cambridge) - Andreas Herzig (IRIT, Toulouse) - Angelo Montanari (University of Udine) - Greg Restall (University of St Andrews) Important Dates ************************************************************************ Extended Submission Deadline: September 3, 2026 AoE Notification to Authors: October 31, 2026 Deadline for camera-ready papers: November 11, 2026 Pre-conference workshops: January 5, 2027 ICLA 2027: January 6-8, 2027 ************************************************************************ Programme Committee Sreejith A V [IIT Palakkad] Philippe Balbiani [IRIT, Toulouse] Nick Bezhanishvili [University of Amsterdam] Abhishek De [Krea University] Tim French [The University of Western Australia] Malvin Gattinger [University of Amsterdam] Sujata Ghosh [Indian Statistical Institute, Chennai] (co-chair) Shibashis Guha [Tata Institute of Fundamental Research] Eberhard Guhe [Fudan University] Yurii Khomskii [University of Amsterdam] Arun Kumar [Banaras Hindu University] Graham Leigh [University of Gothenburg] Dazhu Li [Chinese Academy of Sciences] Hitoshi Omori [Tohoku University] Anantha Padmanabha [IIT Madras] Sophie Pinchinat [IRISA, Universite de Rennes] Dilip Raghavan [National University of Singapore] Subhajit Roy [IIT Kanpur] Prakash Saivasan [Institute of Mathematical Sciences, Chennai] Manidipa Sanyal [University of Calcutta] Sunil Simon [IIT Kanpur] (co-chair) S P Suresh [Chennai Mathematical Institute] Ramanathan Thinniyam Srinivasan [Uppsala University] Sourav Tarafder [St. Xavier's College, Kolkata] Sara Uckelman [Durham University] Yanjing Wang [Peking University] Organising Committee Deepak D’Souza [Indian Institute of Science, Bangalore] Siddhartha Gadgil [Indian Institute of Science, Bangalore] Kamal Lodaya [BGVS Bangalore]

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RHPL@FSTTCS 2026: Call for Proposals
by Abhisekh Sankaran 21 Aug '26

21 Aug '26

TCS Confidential ============================================================= CALL FOR PROPOSALS RHPL@FSTTCS 2026: Workshop on Research Highlights in Programming Languages + Dates: December 16 - 18, 2026 + Venue: IIT Delhi, co-located with FSTTCS 2026 + Website: https://fmindia.cmi.ac.in/rhpl2026/ + Submission deadline: September 28, 2026 IST ============================================================= Dear Colleague, As you may know, FSTTCS 2026 (https://www.fsttcs.org.in/2026/) will be held at IIT Delhi (https://home.iitd.ac.in/) during December 16 - 18, 2026. The conference is organized by IARCS, the Indian Association for Research in Computing Science (https://www.iarcs.org.in/) in association with ACM India (https://india.acm.org/) It is a very visible forum for presenting original results in foundational aspects of Computer Science and Software Technology. As in previous years, the Workshop on Research Highlights in Programming Languages (RHPL) will be co-located with the main FSTTCS conference. The workshop is organized jointly by IARCS and iPLAN (the India Chapter of ACM SIGPLAN; https://india.acm.org/chapters) The focus of the workshop will be on all areas of Programming Languages. The objective of RHPL is to foster interactions between the attendees of the workshop, and more broadly researchers working on Programming Languages, and the traditional FSTTCS community of researchers working on Theoretical Computer Science and Formal Methods. We invite proposals for: + Talks: based on recent work that has been published in reputed venues, or is mature in terms of approach and evaluation. + Posters: - Regular: Based on early ideas that are promising but have not been developed fully. Selections of these proposals will be made based on the promise of research possibilities and their novelty. - Student: Based on unpublished work at any stage. Selected proposals will be included in a student poster competition that will be judged by a panel of experts. More details on the submission topics, submission guidelines and the student poster competition can be found below. --------------- Websites: --------------- RHPL 2026: https://fmindia.cmi.ac.in/rhpl2026/ RHPL 2025: https://fmindia.cmi.ac.in/rhpl2025/ ============= Important Dates ============= All dates below are in Indian Standard Time (IST). - Submission portal opens: August 21, 2026 - Submission deadline: September 28, 2026 - Notification: October 7, 2026 - Early registration deadline: TBA - RHPL@FSTTCS: December 16 - 18, 2026 =============== Submission Topics =============== The submission topics include, but are not limited to, the following: - Applied formal methods - Automated and interactive theorem provers - Compilers - Concurrency and memory models - Domain and type theories - Program analysis and verification - Program sketching, synthesis, and repair - Programming language design and semantics Further, in view of the increasing role of Artificial Intelligence (AI) and Machine Learning (ML) in PL theory and practice, the workshop explicitly includes in its scope themes at this intersection. Of particular interest are the roles of Large Language Models (LLMs) in PL, such as in design and code synthesis, as well as broader mutual influences between AI/ML and PL; for instance, probabilistic programming languages. ==================== Student Poster Competition ==================== We invite students at all stages, from undergraduate to PhD, to submit poster proposals based on their unpublished work. For graduate students, only individual work is allowed to be presented. If the work is being done as part of a group, then the presenters must focus on their individual contributions. Undergraduates can present their individual work and also work done in (undergraduate) team projects. The evaluation of the posters will be on the basis of the technical strength of the work, the presenter's awareness of related literature, and the quality of the poster and presentation. The results will be announced on the RHPL 2026 website following the competition. ================ Submission Guidelines ================ Proposals to the workshop may be submitted using the form below. https://forms.fillout.com/t/7ePHh773f2us Proposals for talks may be based on published or unpublished work. Proposals for posters are only for unpublished work. For both formats, submissions may present either a single study, such as in an individual paper or an unpublished manuscript, or a body of research. Multiple proposal submissions are allowed. Each proposal must be submitted as a single PDF file. Any reasonable style file can be chosen. The proposal page limits are as below; the page counts exclude references. Appendices are to be avoided, and references may contain pointers to papers, preprints, technical reports, or manuscripts under progress that the proposal is based on. + Talks: - Proposals based on work that is published: 2 pages - Proposals based solely on unpublished work: 4 pages + Posters: - Regular (non-student) proposals: 2 pages - Student proposals: 4 pages Talk proposals based on unpublished work and student poster proposals will be provided short referee reports along with their decision notifications. There are no publications of the workshop. Accepted proposals may be compiled into a booklet of abstracts/proposals to be made available on the RHPL 2026 website. ======= Contact ======= For any queries, feel free to write to us at the addresses below. - pankaj.kumar.kalita(a)ibm.com - abhisekh.sankaran(a)tcs.com We look forward to receiving your talk/poster proposals to the workshop. On behalf of the RHPL@FSTTCS workshop organizing committee: Pankaj Kumar Kalita (IBM Research) (co-Chair) Abhisekh Sankaran (TCS Research) (co-Chair) Deepak D'Souza (IISc Bangalore) Uday Khedker (IIT Bombay) Kumar Madhukar (IIT Delhi) Kartik Nagar (IIT Madras) Ganesan Ramalingam (Microsoft) Abhik Roychoudhury (National University of Singapore) Divyesh Unadkat (Synopsys) =====-----=====-----===== Notice: The information contained in this e-mail message and/or attachments to it may contain confidential or privileged information. If you are not the intended recipient, any dissemination, use, review, distribution, printing or copying of the information contained in this e-mail message and/or attachments to it are strictly prohibited. If you have received this communication in error, please notify us by reply e-mail or telephone and immediately and permanently delete the message and any attachments. Thank you

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FSTTCS 2026 - Call for workshops
by Shibashis Guha 12 Aug '26

12 Aug '26

[Apologies if you receive multiple copies.] The FSTTCS 2026 <https://www.fsttcs.org.in/2026/> main conference will be held from 16th - 18th December 2026 at IIT Delhi <https://home.iitd.ac.in/> in Delhi, India. Proposals for workshops around the main conference (two pre-conference days on 14,15 December 2026, and two post-conference days on 19,20 December 2026) can be made by filling out this form <https://forms.gle/QM97uWjU7pLysTfU8>. The topics of the workshops must be broadly aligned with the topics for Track A and Track B. The workshop proposal may include a brief description of the workshop, a short bio of the organisers, a list of tentative speakers, and funding details. The deadline for proposal submission is *September 20*. For queries about the workshop, please write to Kumar Madhukar <https://kumarmadhukar.github.io/> (madhukar(a)cse.iitd.ac.in) or Venkata Koppula <https://web.iitd.ac.in/~kvenkata/> (kvenkata(a)cse.iitd.ac.in)

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Call for participation in compiler hackathon SEGFAULT 2026
by Raveendra Medicherla 11 Aug '26

11 Aug '26

TCS Confidential https://2025.segfault.compilertech.org Hi, We are writing to invite your students to participate in SEGFAULT 2026, India's premier Compiler and Programming Language themed hackathon, supported by CDAC Bangalore and FP Launchpad (IIT Madras). The premise behind SEGFAULT is simple: Compiler/PL/Toolchain projects aren't adequately represented or recognized at regular hackathons. SEGFAULT gives builders a chance to hack on compiler technology and present their projects to a jury of India's best researchers and engineers, in attendance at the Innovations in Innovations In Compiler Technology (IICT) 2026 workshop. This year, we're upping the stakes — with a ₹2,00,000+ prize pool, dedicated mentoring, internship opportunities with our sponsors, and free tickets to IICT 2026 (including travel support) for finalists. Participants can choose to build anything related to compiler technology, or work on problem statements released by our sponsors. The hackathon is fully online, except for the Grand Finale. Important dates: Registration Opens: 1 August 2026 Problem Statements: Released 7 August 2026 Registration Closes: 22 August 2026 Final Evaluation: 19–20 September 2026 Grand Finale: 2–3 October 2026 Venue (Finale only): A V Rama Rao Auditorium, Indian Institute of Science (IISc), Bangalore Sign up at: segfault.compilertech.org Previous year's project showcase: 2025.segfault.compilertech.org We would be grateful if you could share this opportunity with your students — solo entries and teams are both welcome, and all intellectual property is retained by participants. Please do reach out to me at ashutosh(a)compilertech.org for any queries. Best Regards, Ashutosh Pandey on behalf of the Organizing Committee =====-----=====-----===== Notice: The information contained in this e-mail message and/or attachments to it may contain confidential or privileged information. If you are not the intended recipient, any dissemination, use, review, distribution, printing or copying of the information contained in this e-mail message and/or attachments to it are strictly prohibited. If you have received this communication in error, please notify us by reply e-mail or telephone and immediately and permanently delete the message and any attachments. Thank you

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IARCS Verification Seminar Series -- Talk by Vadim Mutilin on August 11 at 1900 hrs IST
by VSS IARCS 10 Aug '26

10 Aug '26

Dear all, The next talk in the IARCS Verification Seminar Series will be given by Vadim Mutilin, a Lead Researcher at ISPRAS and an Associate Professor at MIPT. The talk is scheduled on Tuesday, August 11, at 1900 hrs IST (add to Google calendar <https://calendar.google.com/calendar/event?action=TEMPLATE&tmeid=MXJ1ZTBwcG…> ). The details of the talk can be found on our webpage ( https://fmindia.cmi.ac.in/vss/) and also appended to the body of this email. The Verification Seminar Series, an initiative by the Indian Association for Research in Computing Science (IARCS), is a monthly, online talk-series, broadly in the area of Formal Methods and Programming Languages, with applications in Verification and Synthesis. The aim of this talk-series is to provide a platform for Formal Methods researchers to interact regularly. In addition, we hope that it will make it easier for researchers to explore newer problems/areas and collaborate on them, and for younger researchers to start working in these areas. All are welcome to join. Best regards, Organizers, IARCS Verification Seminar Series ============================================================= Title: Linux Driver Verification: Achievements and Prospects Meeting Link: https://us02web.zoom.us/j/89164094870?pwd=eUFNRWp0bHYxRVpwVVNoVUdHU0djQT09 (Meeting ID: 891 6409 4870, Passcode: 082194) Abstract: This talk focuses on the automatic verification of Linux kernel device drivers. I will discuss the unique challenges that device drivers pose for software verification, as well as the characteristics of Linux kernel development that must be taken into account when designing effective verification techniques. I will present static verification approaches that have helped identify more than 400 real bugs in Linux device drivers. The talk will cover the classes of defects these techniques can detect, their current limitations, and promising directions for future research. Bio: Vadim Mutilin is a Lead Researcher at ISPRAS and an Associate Professor at MIPT. His research focuses on methods and tools for ensuring software correctness and reliability through static and dynamic verification techniques. He received his Ph.D. for his work on the verification of Linux device drivers using predicate abstraction. As part of this research, he made significant contributions to the LDV/Klever verification framework and enhanced verification tools such as BLAST and CPAchecker, adapting them for industrial-scale software systems comprising millions of lines of code, including Linux device drivers and real-time operating systems. These tools are currently used at the Center for System Software Security Research. His research interests include concurrent software verification and the detection of concurrency-related defects. He was one of the key contributors responsible for implementing multithreading support in the ARK TS virtual machine. His current work focuses on scalable techniques for detecting elusive concurrency bugs, including data races, in multithreaded software.

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