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ACM India PhD Clinic mentoring at ISEC 2024

by Madhavan Mukund

----- Forwarded message from IMT2019057 Nandakishore S Menon <Nandakishore.Menon(a)iiitb.ac.in> ----- From: IMT2019057 Nandakishore S Menon <Nandakishore.Menon(a)iiitb.ac.in> Date: Fri, 9 Feb 2024 07:43:19 +0000 Dear esteemed mentor, If you have already registered for ISEC 2024 or are planning to do so soon and plan to be physically present at the conference, we extend a warm invitation for you to connect with the attending PhD students during the event. Throughout these three days, we will be hosting a PhD clinic at IIIT-B, offering a valuable opportunity for you to mentor three to four students. To be considered as a mentor, we kindly request those with a Ph.D. and a minimum of three years of experience to express their interest. If this aligns with your interests, we invite you to complete the mentorship form using the following link: https://docs.google.com/forms/d/1oPm7GSW82_YbcuXVEzUwGKJef3IJaD4TDguCFvAv8Q… For additional details about the ACM PhD Clinic, please refer to the information available here: https://india.acm.org/research/phd-clinic. This collaborative initiative is organized at IIIT-B as part of ISEC 2024. Thank you for considering this invitation. Best Regards, PhD Clinic Team, ISEC 2024 Regards, Nandakishore S Menon ----- End forwarded message -----

10 months, 2 weeks

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SAT 2024: Second Call for Papers

by Supratik Chakraborty

(Apologies for cross-postings, if any) _*SAT 2024: Second Call for Papers*_ SAT 2024 is the 27th edition of the International Conference on Theory and Applications of Satisfiability Testing (SAT). The scope of SAT 2024 includes all aspects of the theory and applications of propositional satisfiability, broadly construed. This also includes Boolean optimization, such as MaxSAT and Pseudo-Boolean (PB) constraints, Quantified Boolean Formulas (QBF), Satisfiability Modulo Theories (SMT), Model Counting, and Constraint Programming (CP) for problems with clear connections to Boolean-level reasoning. Topics of interest include (but are not limited to): * Theoretical advances (including algorithms, proof complexity, parameterized complexity, and other complexity issues) * Practical search algorithms * Knowledge compilation * Implementation-level details of SAT and SMT solving tools and SAT/SMT-based systems * Problem encodings and reformulations * Applications (including novel application domains and improvements to existing applications) * Case studies and reports on insightful findings based on rigorous experimentation Out of Scope Papers claiming to resolve a major long-standing open theoretical question in Mathematics or Computer Science (such as those for which a Millennium Prize is offered), are outside the scope of the conference because there is insufficient time in the schedule to referee such papers; instead, such papers should be submitted to an appropriate technical journal. Paper Categories Submissions to SAT 2024 are invited in the following three categories: * Long papers (9 to 15 pages, excluding references and appendices) * Short papers (up to 8 pages, excluding references and appendices) * Tool papers (up to 8 pages, excluding references and appendices) Long and short papers should contain original research, with sufficient detail to assess the merits and relevance of the contribution. For papers reporting experimental results, authors are strongly encouraged to make their data and implementation available with the submission. Submissions on applications and case studies are encouraged. Such papers should describe details, weaknesses and strengths of the proposed approaches in sufficient depth, but they are not expected to introduce novel solving methods. Long and short papers will be evaluated with the same quality standards, and are expected to contain a similar contribution per page ratio. The authors should choose between a long or a short paper depending on the space they need to fully describe their contribution.The classification between long and short papers impacts the duration of the presentation of the work during the conference. It is the responsibility of the authors to make sure that their paper is self-contained in the chosen limit of pages. There will be no re-classification of submissions by the PC. Tool papers are expected to report on the design and implementation of a tool, its novel features, strengths, limitations and potential applications. A “tool” is interpreted in a broad sense, including descriptions of solvers, pre-processors etc., as well as systems that exploit SAT and related solvers or their extensions for use in a relevant problem domain. A demonstration is expected to accompany a tool presentation. Papers describing tools that have already been presented previously are expected to contain significant and clear enhancements to the tool. Submission Submissions should not be under review elsewhere nor be submitted elsewhere while under review for SAT 2024, and should not consist of previously published material. Submissions not consistent with these guidelines may be returned without review. Papers must be formatted in the LIPIcs LaTeX style available at https://submission.dagstuhl.de/series/details/LIPIcs#author Submissions must be made electronically in PDF format at https://easychair.org/conferences/?conf=sat2024 The reviewing process for SAT 2024 is single-blind. Authors may submit a supplement containing detailed proofs, examples, software, detailed experimental data, or other material related to the submission, to be consulted at the discretion of the reviewers. The supplement should not be used as overflow space for the main paper, which should be self-contained for review purposes. Supplements will be treated with the same degree of confidentiality as the paper itself. The supplement must consist of a single file in one of the following formats: zipped tarball (.tar.gz or .tgz), gzipped file (.gz), or zip archive (.zip). One author of each accepted paper is expected to register for the conference and present it there. Important dates Abstract submission: March 8, 2024 AoE Full paper submission: March 15, 2024 AoE Author response: May 9-13, 2024 AoE Notification of decisions: May 22, 2024 AoE Camera-ready version submission: July 1, 2024 AoE Workshops & Indian SAT+SMT School: August 18-20, 2024 SAT conference: August 21-24, 2024 Best Paper Awards Long and short papers may be considered for a Best Paper Award. If the main author is a student, both in terms of work and writing, the paper may be considered for a Best Student Paper Award. Proceedings All accepted papers will be published as proceedings of the conference in the Leibniz International Proceedings in Informatics (LIPIcs) as a free, open, electronic archive with access to all. Authors will retain full rights over their work. The accepted papers will be published under a CC-BY license. For more information, please visit http://satisfiability.org/SAT24

10 months, 2 weeks

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Register for ISEC 2024

by Madhavan Mukund

----- Forwarded message from IMT2019057 Nandakishore S Menon <Nandakishore.Menon(a)iiitb.ac.in> ----- From: IMT2019057 Nandakishore S Menon <Nandakishore.Menon(a)iiitb.ac.in> Date: Tue, 6 Feb 2024 10:49:48 +0000 Dear All, We hope this message finds you well. This is a friendly reminder to register for the ISEC 2024 Conference. Don't miss the opportunity to indulge in insightful discussions, engaging workshops, and tutorials on various software engineering topics. Registration Link: https://conf.researchr.org/attending/isec-2024/registration For more details, kindly refer to the website<https://conf.researchr.org/home/isec-2024>. Exciting News for Students: We are delighted to announce travel support for students participating from outstation technical institutions in India. Travel Grant for All Students: Each grant covers up to Rs. 3,000 in travel expenses. Additional Support for Presenting Students: Students presenting in any track will receive an extra Rs. 5,000 in travel support. Eligibility Criteria for Travel Grant: Full-time students in a College/Institute/University in India. The institution must be outside Bangalore. Applicants must be registered for ISEC 2024 before applying for the grant. Please note that the travel grant recipients may be requested to contribute up to 7 hours of volunteering during the conference. Secure your spot now for ISEC 2024 by registering at this link<https://conf.researchr.org/attending/isec-2024/registration>. For additional information, please visit the conference website: https://conf.researchr.org/home/isec-2024 Best regards, Nandakishore Menon K Yashovardhan Reddy ISEC 2024 Publicity Chairs ----- End forwarded message -----

10 months, 2 weeks

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CFP IEEE Edge 2024, Shenzhen, China.

by Nitin Auluck

IEEE EDGE 2024 - CALL FOR PAPERS https://conferences.computer.org/edge/2024/ Edge computing, as the convergence of computing and communications executed close to data collection and places of storage and application, provides a paradigm that offers several research and application opportunities across a wide range of domains. At the same time, it raises many fundamental and unprecedented research and development problems and challenges. The 2024 IEEE International Conference on Edge Computing and Communications (IEEE EDGE 2024) aims to continue to be recognized a prime international forum for both researchers and industry practitioners to exchange the latest fundamental advances in state of the art and practice of edge computing, identify emerging research topics, and define the future of edge computing. IEEE EDGE is affiliated with IEEE World Congress on Services (SERVICES). IEEE EDGE 2024 will feature a comprehensive high-quality technical program including research track, tutorial and demonstration. IEEE EDGE 2024 will also include an attractive industry program aimed at practitioners, with keynotes and panels from prominent research, industry leaders, and technological exhibits. IEEE EDGE 2024 invites original papers addressing all aspects related to edge computing theories, technologies and applications. Topics of interest include but are not limited to the following: · Edge Computing Architectures · Edge Computing and Communications Theories · Edge Computing and Network Functions Virtualization · Edge Computing in Multi-cloud environments · Edge Centric Convergence of IoT & Cloud Computing · Collaborative Edge & Cloud Computing · Storage and Caching at the Edge · Edge Access Networks & Systems · Services for Edge Computing · CPU/GPU and Hardware for Edge Computing · Benchmarks and Workloads for Performance of Edge Systems · AI Enabled Edge Computing · Generative AI Continuum - from Edge to Cloud · Artificial Intelligence and ML at the Edge · QoS & QoE at the Edge · Signal Processing in Edge Computing · Edge Computing for Vehicular System & Network · Edge Computing for 5G/6G Network & Systems IMPORTANT DATES (ANYWHERE ON EARTH) * December 1, 2023: EasyChair open for DRAFT submissions * March 17, 2024: EasyChair closes for NEW submissions * March 24, 2024: EasyChair closes for revisions and uploads * May 6, 2024: Acceptance notification * July 7-13, 2024: SERVICES Congress in Shenzhen, China ORGANISING TEAM IEEE EDGE 2024 GENERAL CHAIRS Shuiguang Deng, Zhejiang University Nirmit Desai, IBM Research Gopal Pingali, Accenture IEEE EDGE 2024 PROGRAM CHAIRS Javid Taheri, Karlstad University Shiqiang Wang, IBM Research K. V. Subramaniam, AMD IEEE EDGE 2024 PUBLICITY CHAIRS Nitin Auluck, Indian Institute of Technology, Ropar Luiz F. Bittencourt, University of Campinas, Brazil Antonino Galletta, University of Messina, Italy Honghao Gao, Shanghai University, China Gautam Srivastava, Brandon University, Canada (TBC) -- Dr. Nitin Auluck / डॉ. नितिन औलक | Associate Professor / सह - प्राध्यापक Room #114, S. Ramanujan Block / कमरा #११४, एस. रामानुजम ब्लॉक Department of Computer Science & Engineering / कंप्यूटर विज्ञान और अभियांत्रिकी विभाग Indian Institute of Technology Ropar / भारतीय प्रौद्योगिकी संस्थान रोपड़ | Rupnagar, Punjab, India, 140001 / रूपनगर, पंजाब, भारत, १४०००१ nitin(a)iitrpr.ac.in | nauluck(a)ieee.org | http://www.iitrpr.ac.in/cse/nitin -- **CONFIDENTIALITY NOTICE: The contents of this email message and any attachments are intended solely for the addressee(s) and may contain confidential and/or privileged information and may be legally protected from disclosure. If you are not the intended recipient of this message or their agent, or if this message has been addressed to you in error, please immediately alert the sender by reply email and then delete this message and any attachments. If you are not the intended recipient, you are hereby notified that any use, dissemination, copying, or storage of this message or its attachments is strictly prohibited.* *

10 months, 3 weeks

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World Logic Day Celebrations 2024 (Online)

by abhisekh.sankaran＠tcs.com

Dear all, You might already be aware of the World Logic Day Celebrations (WLDC) organized by the Association for Logic in India. The first part of the celebrations took place at the Madras School of Economics on Jan 20 (last Saturday) in hybrid mode. The second part of the celebrations will be held online on Jan 27 (coming Saturday). Here is the website for the events: https://sites.google.com/view/wldc2024/. The upcoming part of WLDC on Jan 27 will start from 9.45am. The keynote speakers are: - Sourav Chakraborty (ISI Kolkata) - Sujata Ghosh (ISI Chennai) The talks will take place over Zoom and will also be livestreamed on Youtube. The Zoom and Youtube links are provided on the website (they might get updated so please check them again on the day of the event). Everyone is cordially invited to attend. Best regards, -Abhisekh. (On behalf of the WLDC organizers) Tephilla wrote: > (Apologies for cross-postings, if any) > > Call for Abstracts > > Association for Logic in India (ALI), is celebrating World Logic Day on > January 20th 2024 in **hybrid** mode. In-person participation is strongly > encouraged for this event. > > We invite abstracts of contributed talks from young researchers (including > Ph.D. students and Postdocs) in the following areas: > > a) Logic in Computer Science > b) Mathematical Logic > c) Philosophical Logic (including Linguistic and Cognitive Science) > d) Indian Logic > > Authors are invited to submit short abstracts up to 200 words excluding > references as a pdf file. The abstracts should be headed by the title of > the corresponding area (a – d), the title of the paper, and 3 to 5 keywords. > > Important Deadlines: > > Deadline for submission of contributed talks: 05/01/2024 AoE > Notification of Acceptance: 07/01/2024 AoE > > Send the abstract to worldlogicdaycelebrationbyali(a)gmail.com > > Keynote speakers: > > - Rohit Parikh (City University of New York) > - TBA > > > Venue: Madras School of Economics, Chennai > More information on in-person/virtual participation will be shared on the > website to registered participants shortly. > > **Registration URL available on the website** > WLDC24 URL: https://sites.google.com/view/wldc2024/ > > Programme Committee: > Nikhil Balaji (IIT Delhi) > Sankha S. Basu (IIIT Delhi) > Purbita Jana (MSE Chennai) > Amal Dev Manuel (IIT Goa) > Abhishek Sankaran (TCS Research) > > > Organising Committee: > Sankha Basu (IIIT Delhi) > Avijeet Ghosh (ISI Kolkata) > Sujata Ghosh (ISI Chennai) > Purbita Jana (MSE Chennai) > Rakesh Nigam (MSE Chennai) > Tephilla Prince (IIT Dharwad) > Smiha Samanta (ISI Kolkata) > > For more information, please visit WLDC24: > https://sites.google.com/view/wldc2024/ > > Best regards, > Tephilla Prince

11 months

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IARCS Verification Seminar Series -- Talk by Thejaswini Raghavan on Jan. 23 at 1900 hrs IST

by VSS IARCS

Dear all, The next talk in the IARCS Verification Seminar Series will be given by Thejaswini Raghavan, a postdoctoral researcher at IST Austria. The talk is scheduled on Tuesday, Jan. 23, at 1900 hrs IST (add to Google calendar <https://calendar.google.com/calendar/event?action=TEMPLATE&tmeid=MjQxam5sb2…> ). The details of the talk can be found on our webpage ( https://fmindia.cmi.ac.in/vss/), and also appended to the body of this email. The Verification Seminar Series, an initiative by the Indian Association for Research in Computing Science (IARCS), is a monthly, online talk-series, broadly in the area of Formal Methods and Programming Languages, with applications in Verification and Synthesis. The aim of this talk-series is to provide a platform for Formal Methods researchers to interact regularly. In addition, we hope that it will make it easier for researchers to explore newer problems/areas and collaborate on them, and for younger researchers to start working in these areas. All are welcome to join. Best regards, Akash, Deepak, Madhukar, Srivathsan ============================================================= Title: Solving Rabin games using Colourful Universal Trees Meeting Link: https://us02web.zoom.us/j/89164094870?pwd=eUFNRWp0bHYxRVpwVVNoVUdHU0djQT09 (Meeting ID: 891 6409 4870, Passcode: 082194) Abstract: To solve Church's synthesis problem for omega-regular specifications, represented by non-deterministic Buechi automata, there are two polynomial-time equivalent approaches: either reduce it to the emptiness problem for Rabin tree automata or solve a Rabin game. In this talk, we will see how one can solve Rabin games faster with an improvement by a super quadratic dependence on the number of Rabin pairs from the currently best known run time obtained by converting a Rabin game into a parity game, while simultaneously improving its exponential space requirement. Our main technical ingredient is a characterisation of progress measures for Rabin games using colourful trees and a combinatorial construction of succinctly-represented, universal colourful trees. Colourful universal trees are generalisations of universal trees used by Jurdzinski and Lazic (2017) to solve parity games, as well as of Rabin progress measures of Klarlund and Kozen (1991). Further, we will also discuss lower bounds for solving Rabin games that show that our algorithm is tight subject to the exponential time hypothesis, reproving a result of Calude et al. (2022). The first part of the talk is based on joint work with Rupak Majumdar and Irmak Saglam, accepted at TACAS 2024 and the last part about the lower bounds is based on joint work with Antonio Casares, Marcin Pilipczuk, Michal Pilipczuk, Ueverton S. Souza, published at SOSA 2024. Bio: Thejaswini Raghavan is a postdoctoral researcher at IST Austria in the group headed by Thomas A. Henzinger. She did her Ph.D. under the supervision of Marcin Jurdzinski at the University of Warwick. Prior to that, she did her B.Sc. (Hons.) in Mathematics and Computer Science and M.Sc. in Computer Science from Chennai Mathematical Institute (CMI). Her research interests broadly lie in Logic, Automata, Games, and Verification.

11 months

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IARCS Verification Seminar Series -- Talk by Thejaswini Raghavan on Jan. 23 at 1900 hrs IST

by VSS IARCS

Dear all, The next talk in the IARCS Verification Seminar Series will be given by Thejaswini Raghavan, a postdoctoral researcher at IST Austria. The talk is scheduled on Tuesday, Jan. 23, at 1900 hrs IST (add to Google calendar <https://calendar.google.com/calendar/event?action=TEMPLATE&tmeid=MjQxam5sb2…> ). The details of the talk can be found on our webpage ( https://fmindia.cmi.ac.in/vss/), and also appended to the body of this email. The Verification Seminar Series, an initiative by the Indian Association for Research in Computing Science (IARCS), is a monthly, online talk-series, broadly in the area of Formal Methods and Programming Languages, with applications in Verification and Synthesis. The aim of this talk-series is to provide a platform for Formal Methods researchers to interact regularly. In addition, we hope that it will make it easier for researchers to explore newer problems/areas and collaborate on them, and for younger researchers to start working in these areas. All are welcome to join. Best regards, Akash, Deepak, Madhukar, Srivathsan ============================================================= Title: Solving Rabin games using Colourful Universal Trees Meeting Link: https://us02web.zoom.us/j/89164094870?pwd=eUFNRWp0bHYxRVpwVVNoVUdHU0djQT09 (Meeting ID: 891 6409 4870, Passcode: 082194) Abstract: To solve Church's synthesis problem for omega-regular specifications, represented by non-deterministic Buechi automata, there are two polynomial-time equivalent approaches: either reduce it to the emptiness problem for Rabin tree automata or solve a Rabin game. In this talk, we will see how one can solve Rabin games faster with an improvement by a super quadratic dependence on the number of Rabin pairs from the currently best known run time obtained by converting a Rabin game into a parity game, while simultaneously improving its exponential space requirement. Our main technical ingredient is a characterisation of progress measures for Rabin games using colourful trees and a combinatorial construction of succinctly-represented, universal colourful trees. Colourful universal trees are generalisations of universal trees used by Jurdzinski and Lazic (2017) to solve parity games, as well as of Rabin progress measures of Klarlund and Kozen (1991). Further, we will also discuss lower bounds for solving Rabin games that show that our algorithm is tight subject to the exponential time hypothesis, reproving a result of Calude et al. (2022). The first part of the talk is based on joint work with Rupak Majumdar and Irmak Saglam, accepted at TACAS 2024 and the last part about the lower bounds is based on joint work with Antonio Casares, Marcin Pilipczuk, Michal Pilipczuk, Ueverton S. Souza, published at SOSA 2024. Bio: Thejaswini Raghavan is a postdoctoral researcher at IST Austria in the group headed by Thomas A. Henzinger. She did her Ph.D. under the supervision of Marcin Jurdzinski at the University of Warwick. Prior to that, she did her B.Sc. (Hons.) in Mathematics and Computer Science and M.Sc. in Computer Science from Chennai Mathematical Institute (CMI). Her research interests broadly lie in Logic, Automata, Games, and Verification.

11 months, 1 week

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ISEC 2024: Registration and Student Travel Support

by Madhavan Mukund

----- Forwarded message from IMT2019057 Nandakishore S Menon <Nandakishore.Menon(a)iiitb.ac.in> ----- Dear All, Registration is now open for the ISEC 2024 Conference at IIIT Bangalore from 22 February- 24 February. The conference will cover various software engineering topics through discussions, workshops, and tutorials. Registration Link: https://conf.researchr.org/attending/isec-2024/registration Important Registration Information: The registration fee covers access to the entire conference. Registration Deadline: 20th Jan 2024 Authors, presenters, and organizers ensure your registration at the non-student rate by the deadline. Provide the complete title of your work during registration. Travel Support for Students: We are offering travel grants to students for participation from outstation technical institutions in India. Each grant covers up to Rs. 3,000 in travel expenses. Eligibility Criteria: *? ?Full-time students in a College/Institute/University in India. The institution must be outside Bangalore. *? ?Applicants must be registered for ISEC 2024 before applying for the grant. Travel grant recipients may be requested to contribute less than 7 hours for volunteering during the conference. Register now for ISEC 2024 and secure your spot. For more information please check out the website at https://conf.researchr.org/home/isec-2024 Best regards, Nandakishore Menon K Yashovardhan Reddy ISEC 2024 Publicity Chairs ________________________________ ----- End forwarded message -----

11 months, 2 weeks

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Call for Abstracts- World Logic Day Celebration 2024 (Hybrid)

by Tephilla

(Apologies for cross-postings, if any) Call for Abstracts Association for Logic in India (ALI), is celebrating World Logic Day on January 20th 2024 in **hybrid** mode. In-person participation is strongly encouraged for this event. We invite abstracts of contributed talks from young researchers (including Ph.D. students and Postdocs) in the following areas: a) Logic in Computer Science b) Mathematical Logic c) Philosophical Logic (including Linguistic and Cognitive Science) d) Indian Logic Authors are invited to submit short abstracts up to 200 words excluding references as a pdf file. The abstracts should be headed by the title of the corresponding area (a – d), the title of the paper, and 3 to 5 keywords. Important Deadlines: Deadline for submission of contributed talks: 05/01/2024 AoE Notification of Acceptance: 07/01/2024 AoE Send the abstract to worldlogicdaycelebrationbyali(a)gmail.com Keynote speakers: - Rohit Parikh (City University of New York) - TBA Venue: Madras School of Economics, Chennai More information on in-person/virtual participation will be shared on the website to registered participants shortly. **Registration URL available on the website** WLDC24 URL: https://sites.google.com/view/wldc2024/ Programme Committee: Nikhil Balaji (IIT Delhi) Sankha S. Basu (IIIT Delhi) Purbita Jana (MSE Chennai) Amal Dev Manuel (IIT Goa) Abhishek Sankaran (TCS Research) Organising Committee: Sankha Basu (IIIT Delhi) Avijeet Ghosh (ISI Kolkata) Sujata Ghosh (ISI Chennai) Purbita Jana (MSE Chennai) Rakesh Nigam (MSE Chennai) Tephilla Prince (IIT Dharwad) Smiha Samanta (ISI Kolkata) For more information, please visit WLDC24: https://sites.google.com/view/wldc2024/ Best regards, Tephilla Prince

11 months, 3 weeks

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Internship opportunity for formal methods PhD students at GE Aerospace India

by Supratik Chakraborty

I am posting this on behalf of Samhitha Palanganda Poonacha (GE Aerospace) <samhitha.poonacha(a)ge.com>. Please contact Samhitha directly for any queries. ===================== The current V&V process we have for our aircraft engine controls software is fairly involved and manual. The European regulating agencies have mandated a change GE’s V&V process which means much more manual effort for us going forward each time we want to certify our engine controls software. The Research team at Bangalore is currently involved in one such V&V exercise and have identified many opportunities where we can find the right balance between innovation and deploying formal methods that can significantly improve the productivity for the team. We are looking for an intern with a formal methods background who is curious to see what happens to automation in a very complex set up, an aircraft engine, and some of the real-world challenges we need to deal with when designing solutions. To give you an idea: Number of requirements in thousands and written up by a wide variety of people where for many, English is not the primary language, this alone can make things very challenging. The work would involve both supporting some of the V&V activities as well as designing proof-of-concepts for proposed process refinements. Exposure to engineering challenges while being part of a multi-disciplinary unit will be some things the intern can stand to gain. The team itself has folks from a variety of technical backgrounds and additionally solving an array of AI/NLP applications for GE Aerosapce. Ideally we would like someone who can work with us for ~6 months. Job Posting: https://ge.wd5.myworkdayjobs.com/GE_ExternalSite/job/Bengaluru/Research-Int… We can also make the option of a post-doc possible in case someone is interested to see what applied research at GE Aerospace looks like.

11 months, 3 weeks

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