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Pre-doctoral Research Workshop@Ashoka University: Call for Applications
by Aalok Thakkar 09 Nov '24

09 Nov '24

Dear All Ashoka University invites applications from final year undergraduate and masters students for pre-doctoral research workshop 2025 <https://forms.gle/rPfGshT6qFteQj62A>. Registration closes *December 10.* -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- Pre-doctoral Research Workshop Department of Computer Science, Ashoka University The Pre-doctoral Research Workshop offers aspiring doctoral candidates an immersive experience into the world of interdisciplinary computer science research at Ashoka University. Our department's research spans foundational areas such as algorithms, cryptography, data science, logic and automated reasoning, natural language processing, and machine learning, while also extending beyond traditional boundaries into computational social sciences, digital health, digitalization, privacy, and technology policy. Final year undergraduate and masters students with mathematical and computational backgrounds are invited to apply to this workshop and learn from and engage with leading researchers, network with peers who share their academic interests, and gain insights into doctoral studies and graduate school preparation. The workshop participants are strongly encouraged to also participate in the poster session and present their original work (published, under submission, or ongoing). Taking place from January 9th to 11th, 2025, at Ashoka University, Sonipat, Haryana, this year's workshop will focus on how computer science intersects with diverse disciplines—from natural sciences to social sciences. Through our PhD and integrated PhD programs, we welcome students from all relevant academic backgrounds, including non-CS disciplines, recognizing that diverse perspectives drive innovation in computer science research. Join us to explore these possibilities and discover your path toward pursuing a PhD in Computer Science. Registration Link: Here <https://docs.google.com/forms/d/e/1FAIpQLSeT9oYyL-ul-IAo7C2S2PTDu7k5QXwYeT5…> . -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- For any queries, contact the organisers: cs.dept(a)ashoka.edu.in, aalok.thakkar(a)ashoka.edu.in. Thank you and we look forward to your participation. *Aalok Thakkar* Assistant Professor Department of Computer Science aalok.thakkar(a)ashoka.edu.in | aalok-thakkar.github.io Schedule an appointment <https://calendly.com/aalok-thakkar-ashoka/30min> with me. This email and any files transmitted with it are confidential and intended solely for the use of the individual or entity to whom they are addressed. If you have received this email in error, please notify the sender and delete the email from your system.

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WAGS@FSTTCS 2024: Call for Submissions and Participations
by Suman Sadhukhan 06 Nov '24

06 Nov '24

Dear Colleagues, Please find below the call for participation and talks for the Workshop on automata and games for synthesis happening just after FSTTCS at IIT Gandhinagar. Please distribute. Apologies for cross-posting. -------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- *Call for participation* Workshop on automata and games for synthesis <https://sites.google.com/view/fsttcs2024bworkshop> Gandhinagar, Gujarat, India December 19th, 2024 Co-located with Foundations of Software Technology and Theoretical Computer Science (FSTTCS) 2024 --------------------------------------------------------------------------------------------- Submission of contributed talks at: https://sites.google.com/view/fsttcs2024bworkshop/short-presentation --------------------------------------------------------------------------------------------- =================== About the workshop =================== The first workshop on automata and games for synthesis is an on-site event happening on the 19th of December, 2024, in Gandhinagar, India. It is co-located with Foundations of Software Technology and Theoretical Computer Science (FSTTCS) 2024, the premier international computer science conference in India, and takes place each year in December since 1981. Automated synthesis of systems from specifications has been a longstanding goal of computer science. The workshop focuses on various aspects by which automata and game solving are used to tackle problems motivated by synthesis. The workshop has several invited speakers and one session with short-presentations. For the short-presentation, PhD students and postdocs are encouraged to talk about their research in 10-15 minute sessions (exact length will depend on the number of contributions). The workshop does not have any proceedings, and therefore previously published talks or ongoing work are both encouraged to be presented. Topics for the presentation at the workshop include, but are not limited to, the following: Automata Theory Synthesis Games on Finite and Infinite Graphs Computational aspects of Game Theory Concurrency and Distributed computation Formal Languages Games and Automata for Verification Specification and Verification of Finite and Infinite-state Systems ============================ Important dates and information ============================ Deadline: November 14th (AoE) Submit your contributions at: https://sites.google.com/view/fsttcs2024bworkshop/short-presentation Notifications: November 18th 2024 Event: 19th December 2024 ============= Speakers ============= Dmitry Chistikov (University of Warwick) C. Aiswarya (Chennai Mathematical Institute) Youssouf Oualhadj (Université Paris-Est Créteil Val de Marne) and more to be announced. ============= Organisers ============= Sougata Bose Suman Sadhukhan K. S. Thejaswini ============= Program ============= The detailed program will be here <https://sites.google.com/view/fsttcs2024bworkshop/schedule> closer to the workshop. For any queries, contact the organisers: sougata.Bose(a)liverpool.ac.uk, ssadhukh(a)campus.haifa.ac.il, thejaswini.k.s(a)ista.ac.at Regards, Suman Sadhukhan Postdoctoral researcher University of Haifa

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ACM ARCS 2025: Call for poster presentation
by Shibashis Guha 06 Nov '24

06 Nov '24

Academic Research and Careers for Students (ARCS) is an annual symposium hosted by ACM India, dedicated to providing a unique platform for research scholars in Computer Science and related fields across India. The 2025 edition of ARCS will be held on February 27-28 in Coimbatore. If you are a PhD student in India working in any area of Computer Science with an accepted or published paper in a conference or journal, ACM ARCS 2025 [1] formally invites you to submit your publication details for a potential poster presentation at ARCS, held alongside the ACM India Annual Event. We are specifically seeking accepted or published work between Nov 23' to Oct 24' to facilitate meaningful networking among PhD students and research mentors from both academia and industry. Selected students will receive limited travel and accommodation support to attend ARCS and the ACM India Annual Event. Sub-themes include (but not limited to): * Algorithms * Complexity * Logic & Automata * Cryptography * Quantum computation * Information theory * Architecture * Database * Networking * PL & Formal Verification * OS & Compilers * Computer Vision & Graphics * Artificial Intelligence * Machine Learning * NLP, Information retrieval * Social network analysis * Security * Technology for society Key dates: - Submission deadline: November 15, 2024 - Notification of selection: December 15, 2024 Registration link for open call: Click Here [2] For more info. write to:acmarcs2025@gmail.com Or Visit: https://event.india.acm.org/arcs/home/ Links: ------ [1] https://event.india.acm.org/arcs/home/ [2] https://docs.google.com/forms/d/1X3xmmlGpdaSrC_op3LnzMb8z9vgf908A9Vo-BSucKt…

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PhD and post-doc positions at NTU Singapore
by Supratik Chakraborty 05 Nov '24

05 Nov '24

Posting on behalf of Yong Kiam Tan (NTU): We are jointly advertising for several open PhD and postdoc positions in PL/FM at the School of Computer Science and Engineering, Nanyang Technological University (NTU), Singapore. PhD positions are fully funded, and will be for the January 2025 or August 2025 intake at SCSE, NTU. Details of the postdoctoral positions vary, but they are open to candidates with PhD-level qualifications in a range of topics in PL/FM. Please see below for further information on individual openings; interested candidates should contact us directly. Luke Ong, Professor We invite motivated and well-qualified candidates to work on Bayesian Statistical Probabilistic Programming, as part of a research programme funded by the National Research Foundation, Singapore. The appointees will work in the Probabilistic Programming Lab, where research is carried out on a wide range of topics, especially in the interface of programming languages, machine learning, and Bayesian statistics, but also in allied areas in semantics of computation, formal methods and verification, and in logic and algorithms. Bayesian Statistical Probabilistic Programming lies in the interface of programming languages, machine learning, and Bayesian statistics. These positions will suit researchers with expertise in one (or more) of the three areas, and are interested and committed to collaborating with experts in the other areas. Further details are available at https://www3.ntu.edu.sg/home/luke.ong/Vacancies/phd.html Yang Liu, Professor I have fully-funded PhD positions available for PL/SE/Security on web3 security (smart contract and runtime monitoring), AV security and robustness, and Large Language Model (LLM) applications: applying LLM for FM (specification/property generation, proof automation), LLM for security (vulnerability detection via static analysis or fuzzing, vulnerability repair), LLM for SE (multi-agent software development), LLM security (prompt injection, jailbreak, defence against LLM attacks). website: https://personal.ntu.edu.sg/yangliu/ contact: yangliu(a)ntu.edu.sg Conrad Watt, Assistant Professor I have fully-funded PhD positions available for PL research, broadly construed, related to the WebAssembly programming language and virtual machine. A successful applicant will have the opportunity to work closely with WebAssembly's industrial standards body and inform the future direction of the language. I am also looking to recruit postdocs with experience in mechanised theorem proving and programming language semantics, to work on advanced extensions and applications of the WasmCert-Isabelle mechanisation of WebAssembly and related artefacts. A key theme of this work will be driving industrial adoption of verified artefacts - for example, see https://dl.acm.org/doi/abs/10.1145/3591224. Experience with Isabelle/HOL would be highly desirable. Funding is available for up to 4 years of full-time employment. website: conrad-watt.github.io <http://conrad-watt.github.io> contact: conrad.watt(a)ntu.edu.sg Yong Kiam Tan, (incoming) Assistant Professor I am interested in applications of deductive verification and interactive theorem proving in automated reasoning, compilers (CakeML), randomized algorithms, hybrid systems, and cryptography. I am recruiting up to three PhD students and three postdocs for these topics under a new Singapore NRF fellowship project. Please visit https://tanyongkiam.github.io/advert.html for contact and other details. Conrad and Yong Kiam would also like to draw attention to A*STAR's graduate scholarships (https://www.a-star.edu.sg/Scholarships/for-graduate-studies/overview) These competitive national awards offer enhanced support for exceptional PhD applicants, who we would jointly supervise in a project related to the intersection of WebAssembly and CakeML. Please contact us for more details.

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Winter School on Formal Verification & Program Synthesis at CSE-IITD
by Priyanka Golia 22 Oct '24

22 Oct '24

Dear all, The Formal Methods group at CSE IIT Delhi is organizing a Winter School on Formal Verification and Program Synthesis, and registration is now open Important Details: When: 3rd to 6th December Where: CSE, IIT Delhi Who can apply: Final-year undergraduate students, post-graduate (Masters/PhD) students, or industry professionals How to apply: Register now at https://forms.gle/T7gqKbVei8PQwf1x7 Support: Travel support of INR 3000 for students and accommodation at IITD hostels (most likely). More Information: https://priyanka-golia.github.io/WinterSchool24/index.html For any questions, please feel free to contact Kumar Madhukar (madhukar(a)iitd.ac.in <mailto:madhukar@iitd.ac.in>) or Priyanka Golia (pgolia(a)iitd.ac.in <mailto:pgolia@iitd.ac.in>). Thank you! Regards, Priyanka

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RHPL@FSTTCS 2024: Call for submissions and participation
by VSS IARCS 15 Oct '24

15 Oct '24

Dear colleague, As you may know, co-located with FSTTCS 2024 ( https://www.fsttcs.org.in/2024/) IARCS is organizing a Workshop on Research Highlights in Programming Languages (RHPL@FSTTCS). The focus of the workshop will be on all areas of Programming Languages, including but not limited to, Program Analysis and Verification, Applied Formal Methods, and Compilers. Please visit the webpage for more details: https://fmindia.cmi.ac.in/rhpl2024/ The objective of RHPL is to foster interactions between the attendees of the workshop, and more broadly between researchers working on Programming Languages and the traditional FSTTCS community of researchers working on Theoretical Computer Science and Formal Methods. Click here to register: https://fmindia.cmi.ac.in/rhpl2024/attend.html We solicit proposals for (1) Talks -- on recent work that has been published in good venues, or is mature in terms of approach and evaluation, and (2) Posters -- on early ideas that are promising but have not been developed fully. Selections of these proposals will be made based on the promise of research possibilities and their novelty. You may submit a proposal using this Google form: https://forms.gle/B3sj8xu4hrCKar2M9 The important dates are as below. Submission deadline (extended): October 22, 2024 (AoE) Notification: October 25, 2024 Early-bird registration deadline: November 15, 2024 (AoE) RHPL@FSTTCS: December 16-18, 2024 We look forward to your participation in the workshop. On behalf of the RHPL@FSTTCS workshop organizing committee: Deepak D'Souza (IISc Bangalore) Uday Khedker (IIT Bombay) Kumar Madhukar (IIT Delhi) (Co-Chair) Kartik Nagar (IIT Madras) Ganesan Ramalingam (Microsoft) Aseem Rastogi (Microsoft Research) Abhik Roychoudhury (National University of Singapore) Abhisekh Sankaran (Tata Consultancy Services Research) Divyesh Unadkat (Synopsys) (Co-Chair)

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IARCS Verification Seminar Series -- Talk by Jan Křetínský on October 15 at 1900 hrs IST
by VSS IARCS 14 Oct '24

14 Oct '24

Dear all, The next talk in the IARCS Verification Seminar Series will be given by Jan Křetínský, a professor for Formal Methods for Software Reliability at the Technical University of Munich. The talk is scheduled on Tuesday, October 15, at 1900 hrs IST (add to Google calendar <https://calendar.google.com/calendar/event?action=TEMPLATE&tmeid=NWN0OWYwcT…> ). The details of the talk can be found on our webpage ( https://fmindia.cmi.ac.in/vss/) and also appended to the body of this email. The Verification Seminar Series, an initiative by the Indian Association for Research in Computing Science (IARCS), is a monthly, online talk-series, broadly in the area of Formal Methods and Programming Languages, with applications in Verification and Synthesis. The aim of this talk-series is to provide a platform for Formal Methods researchers to interact regularly. In addition, we hope that it will make it easier for researchers to explore newer problems/areas and collaborate on them, and for younger researchers to start working in these areas. All are welcome to join. Best regards, Akash, Deepak, Madhukar, Srivathsan ============================================================= Title: Learning and Guessing Winning Policies in LTL Synthesis via Semantics Meeting Link: https://us02web.zoom.us/j/89164094870?pwd=eUFNRWp0bHYxRVpwVVNoVUdHU0djQT09 (Meeting ID: 891 6409 4870, Passcode: 082194) Abstract: We discuss a learning-based framework for guessing a winning strategy in a parity game originating from a reactive synthesis problem for LTL. Its applications range from cases where the game's huge size prohibits rigorous approaches, over increasing scalability of rigorous synthesis, to explainability of synthesized controllers. We discuss the advantages and caveats of these new avenues in synthesis. On the technical level, we describe (i) how to reflect the highly structured logical information in game's states, the so-called semantic labelling, coming from the recent LTL-to-automata translations, and (ii) to do so by learning from previously solved games, bringing the solution process closer to human-like reasoning. Bio: After PhD from Technical University of Munich in 2013 and from Masaryk University Brno in 2014, Jan Křetínský was a research fellow at IST Austria and since 2015 a professor at TU Munich, getting tenure there. While still affiliated, he has recently moved to MU Brno. His main focus is basic research in verification, control and explainability of complex systems. Since 2013 he has been advocating and pioneering the use of AI and ML in verification.

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IARCS Verification Seminar Series -- Talk by Jan Křetínský on October 15 at 1900 hrs IST
by VSS IARCS 06 Oct '24

06 Oct '24

Dear all, The next talk in the IARCS Verification Seminar Series will be given by Jan Křetínský, a professor for Formal Methods for Software Reliability at the Technical University of Munich. The talk is scheduled on Tuesday, October 15, at 1900 hrs IST (add to Google calendar <https://calendar.google.com/calendar/event?action=TEMPLATE&tmeid=NWN0OWYwcT…> ). The details of the talk can be found on our webpage ( https://fmindia.cmi.ac.in/vss/) and also appended to the body of this email. The Verification Seminar Series, an initiative by the Indian Association for Research in Computing Science (IARCS), is a monthly, online talk-series, broadly in the area of Formal Methods and Programming Languages, with applications in Verification and Synthesis. The aim of this talk-series is to provide a platform for Formal Methods researchers to interact regularly. In addition, we hope that it will make it easier for researchers to explore newer problems/areas and collaborate on them, and for younger researchers to start working in these areas. All are welcome to join. Best regards, Akash, Deepak, Madhukar, Srivathsan ============================================================= Title: Learning and Guessing Winning Policies in LTL Synthesis via Semantics Meeting Link: https://us02web.zoom.us/j/89164094870?pwd=eUFNRWp0bHYxRVpwVVNoVUdHU0djQT09 (Meeting ID: 891 6409 4870, Passcode: 082194) Abstract: We discuss a learning-based framework for guessing a winning strategy in a parity game originating from a reactive synthesis problem for LTL. Its applications range from cases where the game's huge size prohibits rigorous approaches, over increasing scalability of rigorous synthesis, to explainability of synthesized controllers. We discuss the advantages and caveats of these new avenues in synthesis. On the technical level, we describe (i) how to reflect the highly structured logical information in game's states, the so-called semantic labelling, coming from the recent LTL-to-automata translations, and (ii) to do so by learning from previously solved games, bringing the solution process closer to human-like reasoning. Bio: After PhD from Technical University of Munich in 2013 and from Masaryk University Brno in 2014, Jan Křetínský was a research fellow at IST Austria and since 2015 a professor at TU Munich, getting tenure there. While still affiliated, he has recently moved to MU Brno. His main focus is basic research in verification, control and explainability of complex systems. Since 2013 he has been advocating and pioneering the use of AI and ML in verification.

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[FormaliSE 2025] Call for Papers
by Arpit Sharma 02 Oct '24

02 Oct '24

Call for Papers: FORMALISE 2025 13th International Conference on Formal Methods in Software Engineering 27 and 28 April, 2025 co-located with ICSE 2025 (April 27-May 3, 2025), Ottawa, Canada https://conf.researchr.org/home/Formalise-2025 Overview Historically, formal methods academic research and practical software development have had limited mutual interactions — except possibly in specialized domains such as safety-critical software. In recent times, the outlook has considerably improved: on the one hand, formal methods research has delivered more flexible techniques and tools that can support various aspects of the software development process: from user requirements elicitation, to design, implementation, verification and validation, as well as the creation of documentation. On the other hand, software engineering has developed a growing interest in rigorous techniques applied at scale. The FormaliSE conference series promotes work at the intersection of the formal methods and software engineering communities, providing a venue to exchange ideas, experiences, techniques, and results. We believe more collaboration between these two communities can be mutually beneficial by fostering the creation of formal methods that are practically useful and by helping develop higher-quality software. Originally a workshop event, since 2018 FormaliSE has been organized as a conference co-located with ICSE. The 13th edition of FormaliSE will also take place as a co-located conference of ICSE 2025. Areas of interest include but are not limited to: - requirements formalization and formal specification; - approaches, methods and tools for verification and validation; - formal approaches to safety and security related issues; - analysis of performance and other non-functional properties based on formal approaches; - scalability of formal method applications - integration of formal methods within the software development lifecycle (e.g., change management, continuous integration, regression testing, and deployment) - model-based engineering approaches; - correctness-by-construction approaches for software and systems engineering; - application of formal methods to specific domains, e.g., autonomous, cyber-physical, intelligent, and IoT systems; - formal methods for AI-based systems (FM4AI), and AI applied in formal method approaches (AI4FM); - formal methods in a certification context - case studies developed/analyzed with formal approaches - experience reports on the application of formal methods to real-world problems; - guidelines to use formal methods in practice; - usability of formal methods. Important dates: Abstracts due: 11 November 2024 Submissions: 18 November 2024 Notifications: 13 January 2025 Camera ready copies: 5 February 2025 FormaliSE conference: 27-28 April 2025 Paper submission guidelines We accept papers in three categories: - Full research papers describing original research work and results. We encourage authors to include validation of their contributions by means of a case study or experiments. We also welcome research papers focusing on tools and tool development. - Case study papers discussing a significant application that suggests general lessons learned and motivates further research, or empirically validates theoretical results (such as a technique's scalability). - Research ideas papers describing new ideas in preliminary form, in a way that can stimulate interesting discussions at the conference, and suggest future work. All papers submitted to the FormaliSE 2025 conference must be written in English, must be unpublished original work, and must not be under review or submitted elsewhere at the time of submission. Submissions must comply with the FormaliSE's lightweight double-anonymous review process (see below). Full research papers and case study papers can take up to 10 pages including all text, figures, tables and appendices, but excluding references. Research ideas papers can take up to 4 pages, plus up to 1 additional page solely for references. To avoid that authors waste time fitting their papers into the stated limit at the expense of presentation clarity, paper lengths slightly exceeding the stated limit will still be considered, provided that the reviewers find that the presentation is of high quality. All submissions must be in PDF format and must conform to the IEEE conference proceedings template, specified in the IEEE Conference Proceedings Formatting Guidelines (i.e., title in 24pt font and full text in 10pt type): https://www.ieee.org/conferences/publishing/templates.html In LaTeX, use \documentclass[10pt,conference]{IEEEtran} without including the compsoc or compsocconf options. To submit a paper to FormaliSE 2025 use thisHotCRP link: https://formalise25.hotcrp.com/ Lightweight Double-Blind Review Process for Papers As in recent editions, FormaliSE 2025 will use a lightweight double-anonymous process. Authors must omit their names and institutions from the title page, cite their own work in the third person, and omit acknowledgments that may reveal their identity or affiliation. The purpose is reducing chances of reviewer bias influenced by the authors’ identities. The double-anonymous process is, however, lightweight, which means that it should not pose a heavy burden for authors, nor should make a paper's presentation weaker or more difficult to review. Also, advertising the paper as part of your usual research activities (for example, on your personal web-page, in a pre-print archive, by email, in talks or discussions with colleagues) is permitted without penalties. Paper selection Each paper will be reviewed by at least three program committee members that will judge its overall quality in terms of its soundness, significance, novelty, verifiability, and presentation clarity. FormaliSE 2025 will adopt a lightweight response process: if all the reviewers of a given paper agree that a clarification from the authors regarding a specific question could move the paper from "borderline" to "accept", the chairs will relay the reviewers' questions to the authors by email, and then share their reply with the reviewers in HotCRP. The goal of lightweight responses is reducing the chance of random decisions on borderline papers. Hence, they will only be used for a minority of submissions; most papers will not require such an author response. Nevertheless, we would ask the corresponding authors of all submissions to make sure that they are available to answer questions by email upon request. Artifact Evaluation Reproducibility of experimental results is crucial to foster an atmosphere of trustworthy, open, and reusable research. To improve and reward reproducibility, FormaliSE 2025 continues its Artifact Evaluation (AE) procedure. An artifact is any additional material (software, data sets, machine-checkable proofs, etc.) that substantiates the claims made in the paper and ideally makes them fully reproducible. Submission of an artifact is optional but encouraged for all papers where it can support the results presented in the paper. Artifact review is single-anonymous (the paper corresponding to an artifact must still follow the double-anonymous submissions requirements) and will be conducted concurrently with the paper reviewing process. Artifacts will be handled by a separate Artifact Evaluation Committee, and the Artifact Evaluation process will be set up such that the anonymization of the corresponding papers will not be compromised. Accepted papers with a successfully evaluated artefact will be awarded the [EAPLS badges (https://eapls.org/pages/artifact_badges/) that apply (among "Functional", "Reusable", and "Available"). Awarded badges are to be added to the camera-ready version of the paper. Artifacts will be assessed with respect to their consistency with the results presented in the paper, their completeness, their documentation, and their ease of use. The Artifact Evaluation will include an initial check for technical issues; authors of artifacts may be contacted by email within the first two weeks after artifact submission to help resolve any technical problems that prevent the evaluation of an artifact if necessary. The results of an artifact evaluation will not be available to the reviewers of the corresponding paper; hence, they will not affect the paper's acceptance decision. However, reviewers will know whether a paper has submitted *any* artifacts; this piece of information may be taken into account to decide whether the paper should be accepted. Thus, if there are justifiable reasons why a paper's artifacts cannot be submitted, they should be pointed out in the paper so that the reviewers can appreciate them and adjust their expectations accordingly. Detailed guidelines for preparation and submission of artifacts will be described in a dedicated page inFormaliSE 2025's website. Publication All accepted papers are published as part of the ICSE 2025 Proceedings in the ACM and IEEE Digital Libraries. At least one author of each accepted paper is required to register for the conference and present the paper at the conference — physically or, if the circumstances do not allow so, virtually. Failure to register an author will result in a paper being removed from the proceedings. General Chairs Stefania Gnesi, Istituto di Scienza e Tecnologie dell’Informazione, Italy Nico Plat, Thanos, The Netherlands Program Chairs Anastasia Mavridou, KBR / NASA Ames Research Center, USA Gwen Salaün, University Grenoble Alpes, France Artifact Evaluation Chairs Ákos Hajdu, Meta, UK Lina Marsso, University of Toronto, Canada Social Media Chair Quentin Nivon, University Grenoble Alpes, France Program committee Bernhard Aichernig, TU Graz, Austria Toshiaki Aoki, Japan Advanced Institute of Science and Technology, Japan Kyungmin Bae, Pohang University of Science and Technology, Korea Domenico Bianculli, University of Luxembourg, Luxembourg Simon Bliudze, INRIA Lille - Nord Europe, France Giovanna Broccia, ISTI - CNR, Italy Radu Calinescu, University of York, UK Pablo Castro, National University of Rio Cuarto, Argentina Zhenbang Chen, NUDT, China Nancy Day, University of Waterloo, Canada Francisco Durán, University of Málaga, Spain Marie Farrell, University of Manchester, UK Carlo A. Furia, USI Lugano, Switzerland Fatemeh Ghassemi, University of Tehran, Iran Divya Gopinath, KBR/ NASA Ames Research Center, USA Yann-Gaël Guéhéneuc, Concordia University, Canada Paula Herber, University of Münster, Germany Marieke Huisman, University of Twente, The Netherlands Fuyuki Ishikawa, National Institute of Informatics, Japan Xiaoqing Jin, Apple Inc., USA Violet Ka I Pun, Western Norway University of Applied Sciences, Norway Oleksandr Kolchyn, Glushkov Institute of Cybernetics, Ukraine Antónia Lopes, University of Lisbon, Portugal Larissa Meinicke, University of Queensland, Australia Camilo Rocha, Pontificia Universidad Javeriana, Colombia Cristina Seceleanu, Mälardalen University, Sweden Arpit Sharma, EECS Department, IISER Bhopal, India Allison Sullivan, University of Texas, Arlington, USA Heike Wehrheim, University of Oldenburg, Germany

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Junior Research Fellowship (JRF) position at the School of Technology and Computer Science at TIFR Mumbai
by Shibashis Guha 28 Sep '24

28 Sep '24

Start date: November 2024 Salary: INR 37000 + HRA Location: Tata Institute of Fundamental Research Mumbai Duration: One year with a possible extension for one more year depending on performance Essential educational qualification: At least 4-year degree B. E./ B. Tech/B.S. or equivalent in Computer Science, Mathematics, Physics, Electronics & Communication, Electrical Engineering with minimum 60% marks or 6.2 CGPA Last date of application: October 15, 2024 The successful candidate will be working on the "VeriLearn" project led by Shibashis Guha and study the use of machine learning techniques in formal methods as well as on providing provable guarantees for safety and trustworthiness as studied in formal methods for machine-learned systems. The project is aimed at investigating theoretical foundations as well as showing practical usefulness in terms of scalability and efficiency. More details on the position, application procedure, and eligibility criteria can be found at https://tinyurl.com/VeriLearnJRF Application materials can be directly sent via email to the email id mentioned. Shortlisted candidates will be called for an online interview towards the end of October 2024.

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